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Message-Id: <20220328123238.2569322-4-andy.chiu@sifive.com>
Date: Mon, 28 Mar 2022 20:32:37 +0800
From: Andy Chiu <andy.chiu@...ive.com>
To: radhey.shyam.pandey@...inx.com, robert.hancock@...ian.com,
michal.simek@...inx.com, andrew@...n.ch
Cc: davem@...emloft.net, kuba@...nel.org, pabeni@...hat.com,
robh+dt@...nel.org, linux@...linux.org.uk, netdev@...r.kernel.org,
devicetree@...r.kernel.org, robh@...nel.org,
Andy Chiu <andy.chiu@...ive.com>,
Greentime Hu <greentime.hu@...ive.com>
Subject: [PATCH v6 net 3/4] dt-bindings: net: add pcs-handle attribute
Document the new pcs-handle attribute to support connecting to an
external PHY. For Xilinx's AXI Ethernet, this is used when the core
operates in SGMII or 1000Base-X modes and links through the internal
PCS/PMA PHY.
Signed-off-by: Andy Chiu <andy.chiu@...ive.com>
Reviewed-by: Greentime Hu <greentime.hu@...ive.com>
---
.../devicetree/bindings/net/ethernet-controller.yaml | 6 ++++++
Documentation/devicetree/bindings/net/xilinx_axienet.txt | 8 +++++++-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
index 34c5463abcec..978772c04e1c 100644
--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
@@ -102,6 +102,12 @@ properties:
phy-mode:
$ref: "#/properties/phy-connection-type"
+ pcs-handle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Specifies a reference to a node representing a PCS PHY device on a MDIO
+ bus to link with an external PHY (phy-handle) if exists.
+
phy-handle:
$ref: /schemas/types.yaml#/definitions/phandle
description:
diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
index b8e4894bc634..1aa4c6006cd0 100644
--- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
+++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
@@ -26,7 +26,8 @@ Required properties:
specified, the TX/RX DMA interrupts should be on that node
instead, and only the Ethernet core interrupt is optionally
specified here.
-- phy-handle : Should point to the external phy device.
+- phy-handle : Should point to the external phy device if exists. Pointing
+ this to the PCS/PMA PHY is deprecated and should be avoided.
See ethernet.txt file in the same directory.
- xlnx,rxmem : Set to allocated memory buffer for Rx/Tx in the hardware
@@ -68,6 +69,11 @@ Optional properties:
required through the core's MDIO interface (i.e. always,
unless the PHY is accessed through a different bus).
+ - pcs-handle: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
+ modes, where "pcs-handle" should be used to point
+ to the PCS/PMA PHY, and "phy-handle" should point to an
+ external PHY if exists.
+
Example:
axi_ethernet_eth: ethernet@...00000 {
compatible = "xlnx,axi-ethernet-1.00.a";
--
2.34.1
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