netdev - Re: [PATCH v6 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode

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Message-ID: <20220328165839.70f964dc@kernel.org>
Date:   Mon, 28 Mar 2022 16:58:39 -0700
From:   Jakub Kicinski <kuba@...nel.org>
To:     Andy Chiu <andy.chiu@...ive.com>
Cc:     radhey.shyam.pandey@...inx.com, robert.hancock@...ian.com,
        michal.simek@...inx.com, andrew@...n.ch, davem@...emloft.net,
        pabeni@...hat.com, robh+dt@...nel.org, linux@...linux.org.uk,
        netdev@...r.kernel.org, devicetree@...r.kernel.org, robh@...nel.org
Subject: Re: [PATCH v6 net 0/4] Fix broken link on Xilinx's AXI Ethernet in
 SGMII mode

On Mon, 28 Mar 2022 20:32:34 +0800 Andy Chiu wrote:
> The Ethernet driver use phy-handle to reference the PCS/PMA PHY. This
> could be a problem if one wants to configure an external PHY via phylink,
> since it use the same phandle to get the PHY. To fix this, introduce a
> dedicated pcs-handle to point to the PCS/PMA PHY and deprecate the use
> of pointing it with phy-handle. A similar use case of pcs-handle can be
> seen on dpaa2 as well.
> 
> --- patch v5 ---
>  - Re-applying the v4 patch on the net tree.
>  - Describes the pcs-handle DT binding at ethernet-controller level.
> --- patch v6 ---
>  - Remove "preferrably" to clearify usage of pcs_handle.

This set not longer applies, please rebase on latest net/master.