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Message-ID: <20220329185116.24c44f2f@kernel.org>
Date:   Tue, 29 Mar 2022 18:51:16 -0700
From:   Jakub Kicinski <kuba@...nel.org>
To:     Randy Dunlap <rdunlap@...radead.org>
Cc:     netdev@...r.kernel.org, patches@...ts.linux.dev,
        kernel test robot <lkp@...el.com>,
        Horatiu Vultur <horatiu.vultur@...rochip.com>,
        Lars Povlsen <lars.povlsen@...rochip.com>,
        Steen Hegelund <Steen.Hegelund@...rochip.com>,
        UNGLinuxDriver@...rochip.com,
        "David S. Miller" <davem@...emloft.net>,
        Paolo Abeni <pabeni@...hat.com>, bjarni.jonasson@...rochip.com,
        p.zabel@...gutronix.de
Subject: Re: [PATCH] net: sparx5: uses, depends on BRIDGE or !BRIDGE

On Tue, 29 Mar 2022 18:20:25 -0700 Randy Dunlap wrote:
> Fix build errors when BRIDGE=m and SPARX5_SWITCH=y:
> 
> riscv64-linux-ld: drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.o: in function `.L305':
> sparx5_switchdev.c:(.text+0xdb0): undefined reference to `br_vlan_enabled'
> riscv64-linux-ld: drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.o: in function `.L283':
> sparx5_switchdev.c:(.text+0xee0): undefined reference to `br_vlan_enabled'
> 
> Fixes: 3cfa11bac9bb ("net: sparx5: add the basic sparx5 driver")
> Signed-off-by: Randy Dunlap <rdunlap@...radead.org>
> Reported-by: kernel test robot <lkp@...el.com>
> Cc: Horatiu Vultur <horatiu.vultur@...rochip.com>
> Cc: Lars Povlsen <lars.povlsen@...rochip.com>
> Cc: Steen Hegelund <Steen.Hegelund@...rochip.com>
> Cc: UNGLinuxDriver@...rochip.com
> Cc: "David S. Miller" <davem@...emloft.net>
> Cc: Jakub Kicinski <kuba@...nel.org>
> Cc: Paolo Abeni <pabeni@...hat.com>

Gotta CC all the authors of the change under Fixes, please.
Adding them now.

> --- linux-next-20220329.orig/drivers/net/ethernet/microchip/sparx5/Kconfig
> +++ linux-next-20220329/drivers/net/ethernet/microchip/sparx5/Kconfig
> @@ -5,6 +5,7 @@ config SPARX5_SWITCH
>  	depends on OF
>  	depends on ARCH_SPARX5 || COMPILE_TEST
>  	depends on PTP_1588_CLOCK_OPTIONAL
> +	depends on BRIDGE || BRIDGE=n
>  	select PHYLINK
>  	select PHY_SPARX5_SERDES
>  	select RESET_CONTROLLER

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