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Message-ID: <20220406142432.GF2120790@nvidia.com>
Date: Wed, 6 Apr 2022 11:24:32 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Robin Murphy <robin.murphy@....com>
Cc: Alex Williamson <alex.williamson@...hat.com>,
Lu Baolu <baolu.lu@...ux.intel.com>,
Christian Benvenuti <benve@...co.com>,
Cornelia Huck <cohuck@...hat.com>,
David Woodhouse <dwmw2@...radead.org>,
Gerald Schaefer <gerald.schaefer@...ux.ibm.com>,
iommu@...ts.linux-foundation.org, Jason Wang <jasowang@...hat.com>,
Joerg Roedel <joro@...tes.org>, kvm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-arm-msm@...r.kernel.org, linux-rdma@...r.kernel.org,
linux-s390@...r.kernel.org,
Matthew Rosato <mjrosato@...ux.ibm.com>,
"Michael S. Tsirkin" <mst@...hat.com>,
Nelson Escobar <neescoba@...co.com>, netdev@...r.kernel.org,
Rob Clark <robdclark@...il.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@....com>,
virtualization@...ts.linux-foundation.org,
Will Deacon <will@...nel.org>, Christoph Hellwig <hch@....de>,
"Tian, Kevin" <kevin.tian@...el.com>
Subject: Re: [PATCH 1/5] iommu: Replace uses of IOMMU_CAP_CACHE_COHERENCY
with dev_is_dma_coherent()
On Wed, Apr 06, 2022 at 02:56:56PM +0100, Robin Murphy wrote:
> On 2022-04-05 17:16, Jason Gunthorpe wrote:
> > vdpa and usnic are trying to test if IOMMU_CACHE is supported. The correct
> > way to do this is via dev_is_dma_coherent()
>
> Not necessarily...
>
> Disregarding the complete disaster of PCIe No Snoop on Arm-Based systems,
> there's the more interesting effectively-opposite scenario where an SMMU
> bridges non-coherent devices to a coherent interconnect. It's not something
> we take advantage of yet in Linux, and it can only be properly described in
> ACPI, but there do exist situations where IOMMU_CACHE is capable of making
> the device's traffic snoop, but dev_is_dma_coherent() - and
> device_get_dma_attr() for external users - would still say non-coherent
> because they can't assume that the SMMU is enabled and programmed in just
> the right way.
Oh, I didn't know about device_get_dma_attr()..
Considering your future issue, maybe this:
/*
* true if the given domain supports IOMMU_CACHE and when dev is attached to
* that domain it will have coherent DMA and require no cache
* maintenance when IOMMU_CACHE is used.
*/
bool iommu_domain_supports_coherent_dma(struct iommu_domain *domain, struct device *dev)
{
return device_get_dma_attr(dev) == DEV_DMA_COHERENT;
}
? In future it could become a domain op and the SMMU driver could
figure out the situation you described?
Jason
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