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Message-ID: <YlckmZZChBJvyav7@shell.armlinux.org.uk>
Date: Wed, 13 Apr 2022 20:29:29 +0100
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Andrew Lunn <andrew@...n.ch>
Cc: Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Marek BehĂșn <kabel@...nel.org>,
netdev@...r.kernel.org
Subject: Re: [PATCH net 1/3] net: dsa: mv88e6xxx: use BMSR_ANEGCOMPLETE bit
for filling an_complete
On Wed, Apr 13, 2022 at 08:46:32PM +0200, Andrew Lunn wrote:
> On Wed, Apr 13, 2022 at 05:53:52PM +0100, Russell King wrote:
> > From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@...nel.org>
>
> Hi Russell
>
> Does git am parse that correctly? At least it is something
> Jakub/DaveM/Paolo needs to keep an eye on when they accept the series.
If it doesn't git is rather brain-dead - the above is generated by
git format-patch... if git produces emails that it can't accept then
there's definitely something wrong with git!
> > Commit ede359d8843a ("net: dsa: mv88e6xxx: Link in pcs_get_state() if AN
> > is bypassed") added the ability to link if AN was bypassed, and added
> > filling of state->an_complete field, but set it to true if AN was
> > enabled in BMCR, not when AN was reported complete in BMSR.
> >
> > This was done because for some reason, when I wanted to use BMSR value
> > to infer an_complete, I was looking at BMSR_ANEGCAPABLE bit (which was
> > always 1), instead of BMSR_ANEGCOMPLETE bit.
> >
> > Use BMSR_ANEGCOMPLETE for filling state->an_complete.
> >
> > Fixes: ede359d8843a ("net: dsa: mv88e6xxx: Link in pcs_get_state() if AN is bypassed")
> > Signed-off-by: Marek BehĂșn <kabel@...nel.org>
> > Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>
> > ---
> > drivers/net/dsa/mv88e6xxx/serdes.c | 27 +++++++++++----------------
> > 1 file changed, 11 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/net/dsa/mv88e6xxx/serdes.c b/drivers/net/dsa/mv88e6xxx/serdes.c
> > index 7b37d45bc9fb..1a19c5284f2c 100644
> > --- a/drivers/net/dsa/mv88e6xxx/serdes.c
> > +++ b/drivers/net/dsa/mv88e6xxx/serdes.c
> > @@ -50,22 +50,17 @@ static int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip,
> > }
> >
> > static int mv88e6xxx_serdes_pcs_get_state(struct mv88e6xxx_chip *chip,
> > - u16 ctrl, u16 status, u16 lpa,
> > + u16 bmsr, u16 lpa, u16 status,
> > struct phylink_link_state *state)
> > {
> > state->link = !!(status & MV88E6390_SGMII_PHY_STATUS_LINK);
> > + state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
> >
> > if (status & MV88E6390_SGMII_PHY_STATUS_SPD_DPL_VALID) {
> > /* The Spped and Duplex Resolved register is 1 if AN is enabled
>
> It looks like there is a typ0 here for speed.
Will fix.
> Reviewed-by: Andrew Lunn <andrew@...n.ch>
Thanks.
--
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