lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-ID: <YlkyU7jRAi5037up@shell.armlinux.org.uk> Date: Fri, 15 Apr 2022 09:52:35 +0100 From: "Russell King (Oracle)" <linux@...linux.org.uk> To: Clément Léger <clement.leger@...tlin.com> Cc: Andrew Lunn <andrew@...n.ch>, Vivien Didelot <vivien.didelot@...il.com>, Florian Fainelli <f.fainelli@...il.com>, Vladimir Oltean <olteanv@...il.com>, "David S . Miller" <davem@...emloft.net>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Geert Uytterhoeven <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>, Heiner Kallweit <hkallweit1@...il.com>, Thomas Petazzoni <thomas.petazzoni@...tlin.com>, Herve Codina <herve.codina@...tlin.com>, Miquèl Raynal <miquel.raynal@...tlin.com>, Milan Stevanovic <milan.stevanovic@...com>, Jimmy Lalande <jimmy.lalande@...com>, linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org, Laurent Gonzales <laurent.gonzales@....se.com>, Jean-Pierre Geslin <jean-pierre.geslin@....se.com>, Phil Edworthy <phil.edworthy@...esas.com> Subject: Re: [PATCH net-next 06/12] net: dsa: rzn1-a5psw: add Renesas RZ/N1 advanced 5 port switch driver On Fri, Apr 15, 2022 at 10:40:29AM +0200, Clément Léger wrote: > Le Thu, 14 Apr 2022 14:02:10 +0100, > "Russell King (Oracle)" <linux@...linux.org.uk> a écrit : > > > On Thu, Apr 14, 2022 at 02:22:44PM +0200, Clément Léger wrote: > > > Add Renesas RZ/N1 advanced 5 port switch driver. This switch handles 5 > > > ports including 1 CPU management port. A MDIO bus is also exposed by > > > this switch and allows to communicate with PHYs connected to the ports. > > > Each switch port (except for the CPU management ports) are connected to > > > the MII converter. > > > > > > This driver include basic bridging support, more support will be added > > > later (vlan, etc). > > > > This patch looks to me like it needs to be updated... > > Hi Russell, > > When you say so, do you expect the VLAN support to be included ? I was referring to the use of .phylink_validate rather than .phylink_get_caps - all but one DSA driver have been recently updated to use the latter, and the former should now only be used in exceptional circumstances. Thanks. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
Powered by blists - more mailing lists