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Message-Id: <20220419102709.26432-2-josua@solid-run.com>
Date: Tue, 19 Apr 2022 13:27:07 +0300
From: Josua Mayer <josua@...id-run.com>
To: netdev@...r.kernel.org
Cc: alvaro.karsz@...id-run.com, Josua Mayer <josua@...id-run.com>,
Michael Hennerich <michael.hennerich@...log.com>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Alexandru Ardelean <alexandru.ardelean@...log.com>
Subject: [PATCH v2 1/3] dt-bindings: net: adin: document phy clock output properties
The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
well as providing the reference clock on CLK25_REF.
Add DT properties to configure both pins.
Signed-off-by: Josua Mayer <josua@...id-run.com>
---
V1 -> V2: changed clkout property to enum
V1 -> V2: added property for CLK25_REF pin
.../devicetree/bindings/net/adi,adin.yaml | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml
index 1129f2b58e98..3e0c6304f190 100644
--- a/Documentation/devicetree/bindings/net/adi,adin.yaml
+++ b/Documentation/devicetree/bindings/net/adi,adin.yaml
@@ -36,6 +36,23 @@ properties:
enum: [ 4, 8, 12, 16, 20, 24 ]
default: 8
+ adi,phy-output-clock:
+ description: Select clock output on GP_CLK pin. Three clocks are available:
+ A 25MHz reference, a free-running 125MHz and a recovered 125MHz.
+ The phy can also automatically switch between the reference and the
+ respective 125MHz clocks based on its internal state.
+ $ref: /schemas/types.yaml#/definitions/string
+ enum:
+ - 25mhz-reference
+ - 125mhz-free-running
+ - 125mhz-recovered
+ - adaptive-free-running
+ - adaptive-recovered
+
+ adi,phy-output-reference-clock:
+ description: Enable 25MHz reference clock output on CLK25_REF pin.
+ $ref: /schemas/types.yaml#/definitions/flag
+
unevaluatedProperties: false
examples:
--
2.34.1
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