netdev - [RFC PATCH net-next 2/2] net: phy: micrel: Implement set/get_adj

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Message-ID: <20220419083704.48573-3-horatiu.vultur@microchip.com>
Date:   Tue, 19 Apr 2022 10:37:04 +0200
From:   Horatiu Vultur <horatiu.vultur@...rochip.com>
To:     <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC:     <andrew@...n.ch>, <hkallweit1@...il.com>, <linux@...linux.org.uk>,
        <davem@...emloft.net>, <kuba@...nel.org>, <pabeni@...hat.com>,
        <UNGLinuxDriver@...rochip.com>, <richardcochran@...il.com>,
        Horatiu Vultur <horatiu.vultur@...rochip.com>
Subject: [RFC PATCH net-next 2/2] net: phy: micrel: Implement set/get_adj_latency for lan8814

The lan8814 driver supports adjustments of the latency in the silicon
based on the speed and direction, therefore implement set/get_adj_latency
to adjust the HW.

Signed-off-by: Horatiu Vultur <horatiu.vultur@...rochip.com>
---
 drivers/net/phy/micrel.c | 87 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 87 insertions(+)

diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 96840695debd..099d1ecd6dad 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -120,6 +120,15 @@
 #define PTP_TIMESTAMP_EN_PDREQ_			BIT(2)
 #define PTP_TIMESTAMP_EN_PDRES_			BIT(3)
 
+#define PTP_RX_LATENCY_1000			0x0224
+#define PTP_TX_LATENCY_1000			0x0225
+
+#define PTP_RX_LATENCY_100			0x0222
+#define PTP_TX_LATENCY_100			0x0223
+
+#define PTP_RX_LATENCY_10			0x0220
+#define PTP_TX_LATENCY_10			0x0221
+
 #define PTP_TX_PARSE_L2_ADDR_EN			0x0284
 #define PTP_RX_PARSE_L2_ADDR_EN			0x0244
 
@@ -208,6 +217,16 @@
 #define PTP_TSU_INT_STS_PTP_RX_TS_OVRFL_INT_	BIT(1)
 #define PTP_TSU_INT_STS_PTP_RX_TS_EN_		BIT(0)
 
+/* Represents the reset value of the latency registers,
+ * The values are express in ns
+ */
+#define LAN8814_RX_10_LATENCY			8874
+#define LAN8814_TX_10_LATENCY			11850
+#define LAN8814_RX_100_LATENCY			2346
+#define LAN8814_TX_100_LATENCY			705
+#define LAN8814_RX_1000_LATENCY			429
+#define LAN8814_TX_1000_LATENCY			201
+
 /* PHY Control 1 */
 #define MII_KSZPHY_CTRL_1			0x1e
 #define KSZ8081_CTRL1_MDIX_STAT			BIT(4)
@@ -2657,6 +2676,72 @@ static int lan8804_config_init(struct phy_device *phydev)
 	return 0;
 }
 
+static int lan8814_set_adj_latency(struct phy_device *phydev,
+				   enum ethtool_link_mode_bit_indices link_mode,
+				   s32 rx, s32 tx)
+{
+	switch (link_mode) {
+	case ETHTOOL_LINK_MODE_10baseT_Half_BIT:
+	case ETHTOOL_LINK_MODE_10baseT_Full_BIT:
+		rx += LAN8814_RX_10_LATENCY;
+		tx += LAN8814_TX_10_LATENCY;
+		lanphy_write_page_reg(phydev, 5, PTP_RX_LATENCY_10, rx);
+		lanphy_write_page_reg(phydev, 5, PTP_TX_LATENCY_10, tx);
+		return 0;
+	case ETHTOOL_LINK_MODE_100baseT_Half_BIT:
+	case ETHTOOL_LINK_MODE_100baseT_Full_BIT:
+		rx += LAN8814_RX_100_LATENCY;
+		tx += LAN8814_TX_100_LATENCY;
+		lanphy_write_page_reg(phydev, 5, PTP_RX_LATENCY_100, rx);
+		lanphy_write_page_reg(phydev, 5, PTP_TX_LATENCY_100, tx);
+		return 0;
+	case ETHTOOL_LINK_MODE_1000baseT_Half_BIT:
+	case ETHTOOL_LINK_MODE_1000baseT_Full_BIT:
+		rx += LAN8814_RX_1000_LATENCY;
+		tx += LAN8814_TX_1000_LATENCY;
+		lanphy_write_page_reg(phydev, 5, PTP_RX_LATENCY_1000, rx);
+		lanphy_write_page_reg(phydev, 5, PTP_TX_LATENCY_1000, tx);
+		return 0;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int lan8814_get_adj_latency(struct phy_device *phydev,
+				   enum ethtool_link_mode_bit_indices link_mode,
+				   s32 *rx, s32 *tx)
+{
+	switch (link_mode) {
+	case ETHTOOL_LINK_MODE_10baseT_Half_BIT:
+	case ETHTOOL_LINK_MODE_10baseT_Full_BIT:
+		*rx = lanphy_read_page_reg(phydev, 5, PTP_RX_LATENCY_10);
+		*tx = lanphy_read_page_reg(phydev, 5, PTP_TX_LATENCY_10);
+		*rx -= LAN8814_RX_10_LATENCY;
+		*tx -= LAN8814_TX_10_LATENCY;
+		return 0;
+	case ETHTOOL_LINK_MODE_100baseT_Half_BIT:
+	case ETHTOOL_LINK_MODE_100baseT_Full_BIT:
+		*rx = lanphy_read_page_reg(phydev, 5, PTP_RX_LATENCY_100);
+		*tx = lanphy_read_page_reg(phydev, 5, PTP_TX_LATENCY_100);
+		*rx -= LAN8814_RX_100_LATENCY;
+		*tx -= LAN8814_TX_100_LATENCY;
+		return 0;
+	case ETHTOOL_LINK_MODE_1000baseT_Half_BIT:
+	case ETHTOOL_LINK_MODE_1000baseT_Full_BIT:
+		*rx = lanphy_read_page_reg(phydev, 5, PTP_RX_LATENCY_1000);
+		*tx = lanphy_read_page_reg(phydev, 5, PTP_TX_LATENCY_1000);
+		*rx -= LAN8814_RX_1000_LATENCY;
+		*tx -= LAN8814_TX_1000_LATENCY;
+		return 0;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 static irqreturn_t lan8814_handle_interrupt(struct phy_device *phydev)
 {
 	u16 tsu_irq_status;
@@ -3052,6 +3137,8 @@ static struct phy_driver ksphy_driver[] = {
 	.resume		= kszphy_resume,
 	.config_intr	= lan8814_config_intr,
 	.handle_interrupt = lan8814_handle_interrupt,
+	.set_adj_latency = lan8814_set_adj_latency,
+	.get_adj_latency = lan8814_get_adj_latency,
 }, {
 	.phy_id		= PHY_ID_LAN8804,
 	.phy_id_mask	= MICREL_PHY_ID_MASK,
-- 
2.33.0