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Date: Thu, 21 Apr 2022 14:27:16 +0200 From: Andrew Lunn <andrew@...n.ch> To: Josua Mayer <josua@...id-run.com> Cc: netdev@...r.kernel.org, alvaro.karsz@...id-run.com, Russell King <linux@...linux.org.uk>, Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, Pengutronix Kernel Team <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>, NXP Linux Team <linux-imx@....com> Subject: Re: [PATCH v2 3/3] ARM: dts: imx6qdl-sr-som: update phy configuration for som revision 1.9 On Tue, Apr 19, 2022 at 01:27:09PM +0300, Josua Mayer wrote: > Since SoM revision 1.9 the PHY has been replaced with an ADIN1300, > add an entry for it next to the original. > > Co-developed-by: Alvaro Karsz <alvaro.karsz@...id-run.com> > Signed-off-by: Alvaro Karsz <alvaro.karsz@...id-run.com> > Signed-off-by: Josua Mayer <josua@...id-run.com> > --- > V1 -> V2: changed dts property name > > arch/arm/boot/dts/imx6qdl-sr-som.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi > index f86efd0ccc40..d46182095d79 100644 > --- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi > +++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi > @@ -83,6 +83,12 @@ ethernet-phy@4 { > qca,clk-out-frequency = <125000000>; > qca,smarteee-tw-us-1g = <24>; > }; > + > + /* ADIN1300 (som rev 1.9 or later) */ > + ethernet-phy@1 { > + reg = <1>; > + adi,phy-output-clock = "125mhz-free-running"; > + }; There is currently the comment: * The PHY can appear at either address 0 or 4 due to the * configuration (LED) pin not being pulled sufficiently. */ It would be good to add another comment about this PHY at address 1. Andrew
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