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Date: Mon, 25 Apr 2022 03:30:27 +0000
From: "Ong, Boon Leong" <boon.leong.ong@...el.com>
To: 'Russell King' <linux@...linux.org.uk>
CC: Alexandre Torgue <alexandre.torgue@...com>,
Jose Abreu <joabreu@...opsys.com>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Paolo Abeni <pabeni@...hat.com>,
"David S . Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-stm32@...md-mailman.stormreply.com"
<linux-stm32@...md-mailman.stormreply.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH net-next 1/4] net: pcs: xpcs: add CL37 1000BASE-X AN
support
>On Fri, Apr 22, 2022 at 03:35:02PM +0800, Ong Boon Leong wrote:
>> @@ -774,6 +788,58 @@ static int xpcs_config_aneg_c37_sgmii(struct
>dw_xpcs *xpcs, unsigned int mode)
>> return ret;
>> }
>>
>> +static int xpcs_config_aneg_c37_1000basex(struct dw_xpcs *xpcs, unsigned
>int mode,
>> + const unsigned long *advertising)
>> +{
>> + int ret, mdio_ctrl;
>> +
>> + /* For AN for 1000BASE-X mode, the settings are :-
>> + * 1) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 0b (Disable C37 AN in
>case
>> + * it is already enabled)
>> + * 2) VR_MII_AN_CTRL Bit(2:1)[PCS_MODE] = 00b (1000BASE-X C37)
>> + * 3) SR_MII_AN_ADV Bit(6)[FD] = 1b (Full Duplex)
>> + * Note: Half Duplex is rarely used, so don't advertise.
>> + * 4) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 1b (Enable C37 AN)
>
>So if this function gets called to update the advertisement - even if
>there is no actual change - we go through a AN-disable..AN-enable
>dance and cause the link to re-negotiate. That doesn't sound like nice
>behaviour.
Good feedback. Will look into this part.
>
>> + */
>> + mdio_ctrl = xpcs_read(xpcs, MDIO_MMD_VEND2,
>DW_VR_MII_MMD_CTRL);
>> + if (mdio_ctrl < 0)
>> + return mdio_ctrl;
>> +
>> + if (mdio_ctrl & AN_CL37_EN) {
>> + ret = xpcs_write(xpcs, MDIO_MMD_VEND2,
>DW_VR_MII_MMD_CTRL,
>> + mdio_ctrl & ~AN_CL37_EN);
>> + if (ret < 0)
>> + return ret;
>> + }
>> +
>> + ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL);
>> + if (ret < 0)
>> + return ret;
>> +
>> + ret &= ~DW_VR_MII_PCS_MODE_MASK;
>> + ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL,
>ret);
>> + if (ret < 0)
>> + return ret;
>> +
>> + ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_ADVERTISE);
>> + ret |= ADVERTISE_1000XFULL;
>> + ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MII_ADVERTISE, ret);
>
>What if other bits are already set in the MII_ADVERTISE register?
>Maybe consider using phylink_mii_c22_pcs_encode_advertisement()?
The IP supports C45 MII MMD access and not C22. Your feedback does
make sense to strengthen the logics here. Thanks
>
>The pcs_config() method is also supposed to return either a negative
>error, 0 for no advertisement change, or positive for an advertisement
>change, in which case phylink will trigger a call to pcs_an_restart().
>
>> +static int xpcs_get_state_c37_1000basex(struct dw_xpcs *xpcs,
>> + struct phylink_link_state *state)
>> +{
>> + int lpa, adv;
>> + int ret;
>> +
>> + ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL);
>> + if (ret < 0)
>> + return ret;
>> +
>> + if (ret & AN_CL37_EN) {
>> + /* Reset link_state */
>> + state->link = false;
>> + state->speed = SPEED_UNKNOWN;
>> + state->duplex = DUPLEX_UNKNOWN;
>> + state->pause = 0;
>
>Phylink guarantees that speed, duplex and pause are set to something
>sensible - please remove these. The only one you probably need here
>is state->link.
Thanks for the input here.
>
>> +
>> + lpa = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_LPA);
>> + if (lpa < 0 || lpa & LPA_RFAULT)
>> + return false;
>
>This function does not return a boolean. Returning "false" is the same
>as returning 0, which means "no error" but an error has occurred.
Good catch.
>
>> +
>> + adv = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_ADVERTISE);
>> + if (adv < 0)
>> + return false;
>
>Ditto.
>
>> +
>> + if (lpa & ADVERTISE_1000XFULL &&
>> + adv & ADVERTISE_1000XFULL) {
>> + state->speed = SPEED_1000;
>> + state->duplex = DUPLEX_FULL;
>> + state->link = true;
>> + }
>> +
>> + /* Clear CL37 AN complete status */
>> + ret = xpcs_write(xpcs, MDIO_MMD_VEND2,
>DW_VR_MII_AN_INTR_STS, 0);
>> + } else {
>> + state->link = true;
>> + state->speed = SPEED_1000;
>> + state->duplex = DUPLEX_FULL;
>> + state->pause = 0;
>
>If we're in AN-disabled mode, phylink will set state->speed and
>state->duplex according to the user's parameters, so there should be no
>need to do it here.
Thanks for the input.
>
>> @@ -994,9 +1143,21 @@ void xpcs_link_up(struct phylink_pcs *pcs,
>unsigned int mode,
>> return xpcs_config_usxgmii(xpcs, speed);
>> if (interface == PHY_INTERFACE_MODE_SGMII)
>> return xpcs_link_up_sgmii(xpcs, mode, speed, duplex);
>> + if (interface == PHY_INTERFACE_MODE_1000BASEX)
>> + return xpcs_link_up_1000basex(xpcs, speed, duplex);
>> }
>> EXPORT_SYMBOL_GPL(xpcs_link_up);
>>
>> +static void xpcs_an_restart(struct phylink_pcs *pcs)
>> +{
>> + struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);
>> + int ret;
>> +
>> + ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1);
>> + ret |= BMCR_ANRESTART;
>> + ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, ret);
>
>If xpcs_read() returns an error, we try to write the error back to
>the control register? Is that a good idea/
Thanks! I will fix this.
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