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Message-ID: <71d829c4-b280-7d6e-647d-79a1baf9408b@igalia.com> Date: Fri, 29 Apr 2022 18:38:19 -0300 From: "Guilherme G. Piccoli" <gpiccoli@...lia.com> To: Marc Zyngier <maz@...nel.org>, "Michael Kelley (LINUX)" <mikelley@...rosoft.com> Cc: akpm@...ux-foundation.org, bhe@...hat.com, pmladek@...e.com, kexec@...ts.infradead.org, linux-kernel@...r.kernel.org, bcm-kernel-feedback-list@...adcom.com, linuxppc-dev@...ts.ozlabs.org, linux-alpha@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-edac@...r.kernel.org, linux-hyperv@...r.kernel.org, linux-leds@...r.kernel.org, linux-mips@...r.kernel.org, linux-parisc@...r.kernel.org, linux-pm@...r.kernel.org, linux-remoteproc@...r.kernel.org, linux-s390@...r.kernel.org, linux-tegra@...r.kernel.org, linux-um@...ts.infradead.org, linux-xtensa@...ux-xtensa.org, netdev@...r.kernel.org, openipmi-developer@...ts.sourceforge.net, rcu@...r.kernel.org, sparclinux@...r.kernel.org, xen-devel@...ts.xenproject.org, x86@...nel.org, kernel-dev@...lia.com, kernel@...ccoli.net, halves@...onical.com, fabiomirmar@...il.com, alejandro.j.jimenez@...cle.com, andriy.shevchenko@...ux.intel.com, arnd@...db.de, bp@...en8.de, corbet@....net, d.hatayama@...fujitsu.com, dave.hansen@...ux.intel.com, dyoung@...hat.com, feng.tang@...el.com, gregkh@...uxfoundation.org, hidehiro.kawai.ez@...achi.com, jgross@...e.com, john.ogness@...utronix.de, keescook@...omium.org, luto@...nel.org, mhiramat@...nel.org, mingo@...hat.com, paulmck@...nel.org, peterz@...radead.org, rostedt@...dmis.org, senozhatsky@...omium.org, stern@...land.harvard.edu, tglx@...utronix.de, vgoyal@...hat.com, vkuznets@...hat.com, will@...nel.org, Russell King <linux@...linux.org.uk> Subject: Re: [PATCH 02/30] ARM: kexec: Disable IRQs/FIQs also on crash CPUs shutdown path Thanks Marc and Michael for the review/discussion. On 29/04/2022 15:20, Marc Zyngier wrote: > [...] > My expectations would be that, since we're getting here using an IPI, > interrupts are already masked. So what reenabled them the first place? > > Thanks, > > M. > Marc, I did some investigation in the code (and tried/failed in the ARM documentation as well heh), but this is still not 100% clear for me. You're saying IPI calls disable IRQs/FIQs by default in the the target CPUs? Where does it happen? I'm a bit confused if this a processor mechanism, or it's in code. Looking the smp_send_stop() in arch/arm/, it does IPI the CPUs, with the flag IPI_CPU_STOP, eventually calling ipi_cpu_stop(), and the latter does disable IRQ/FIQ in code - that's where I stole my code from. But crash_smp_send_stop() is different, it seems to IPI the other CPUs with the flag IPI_CALL_FUNC, which leads to calling generic_smp_call_function_interrupt() - does it disable interrupts/FIQs as well? I couldn't find it. Appreciate your clarifications about that, thanks again. Cheers, Guilherme
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