netdev - Re: [net-next v2 00/12] add support for Renesas RZ/N1 ethernet subsystem devices

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Date:   Mon, 2 May 2022 08:51:03 +0200
From:   Clément Léger <clement.leger@...tlin.com>
To:     Jakub Kicinski <kuba@...nel.org>
Cc:     Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Paolo Abeni <pabeni@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Herve Codina <herve.codina@...tlin.com>,
        Miquèl Raynal <miquel.raynal@...tlin.com>,
        Milan Stevanovic <milan.stevanovic@...com>,
        Jimmy Lalande <jimmy.lalande@...com>,
        Pascal Eberhard <pascal.eberhard@...com>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [net-next v2 00/12] add support for Renesas RZ/N1 ethernet
 subsystem devices

Le Fri, 29 Apr 2022 12:32:35 -0700,
Jakub Kicinski <kuba@...nel.org> a écrit :

> On Fri, 29 Apr 2022 16:34:53 +0200 Clément Léger wrote:
> > The Renesas RZ/N1 SoCs features an ethernet subsystem which contains
> > (most notably) a switch, two GMACs, and a MII converter [1]. This
> > series adds support for the switch and the MII converter.
> > 
> > The MII converter present on this SoC has been represented as a PCS
> > which sit between the MACs and the PHY. This PCS driver is probed from
> > the device-tree since it requires to be configured. Indeed the MII
> > converter also contains the registers that are handling the muxing of
> > ports (Switch, MAC, HSR, RTOS, etc) internally to the SoC.
> > 
> > The switch driver is based on DSA and exposes 4 ports + 1 CPU
> > management port. It include basic bridging support as well as FDB and
> > statistics support.  
> 
> Build's not happy (W=1 C=1):
> 
> drivers/net/dsa/rzn1_a5psw.c:574:29: warning: symbol 'a5psw_switch_ops' was not declared. Should it be static?
> In file included from ../drivers/net/dsa/rzn1_a5psw.c:17:
> drivers/net/dsa/rzn1_a5psw.h:221:1: note: offset of packed bit-field ‘port_mask’ has changed in GCC 4.4
>   221 | } __packed;
>       | ^
> 

Hi Jakub, I only had this one (due to the lack of W=1 C=1 I guess) which
I thought (wrongly) that it was due to my GCC version:

  CC      net/dsa/switch.o
  CC      net/dsa/tag_8021q.o
In file included from ../drivers/net/dsa/rzn1_a5psw.c:17:
../drivers/net/dsa/rzn1_a5psw.h:221:1: note: offset of packed bit-field
  ‘port_mask’ has changed in GCC 4.4 221 | } __packed;
      | ^
  CC      kernel/module.o
  CC      drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.o
  CC      drivers/net/ethernet/stmicro/stmmac/dwmac100_core.o

I'll fix the other errors which are more trivial, however, I did not
found a way to fix the packed bit-field warning.

Thanks

> drivers/net/dsa/rzn1_a5psw.h:200: warning: Function parameter or member 'hclk' not described in 'a5psw'
> drivers/net/dsa/rzn1_a5psw.h:200: warning: Function parameter or member 'clk' not described in 'a5psw'
> 
> Not sure how many of these are added by you but I think 2 at least.



-- 
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com