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Message-ID: <CAMuHMdV1anDky+_hyCnsptuDnCN=eaY6RrsTVU36jujkFr+DqQ@mail.gmail.com>
Date:   Tue, 3 May 2022 17:53:10 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Clément Léger <clement.leger@...tlin.com>
Cc:     Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Herve Codina <herve.codina@...tlin.com>,
        Miquèl Raynal <miquel.raynal@...tlin.com>,
        Milan Stevanovic <milan.stevanovic@...com>,
        Jimmy Lalande <jimmy.lalande@...com>,
        Pascal Eberhard <pascal.eberhard@...com>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [net-next v2 04/12] net: pcs: add Renesas MII converter driver

Hi Clément,

On Fri, Apr 29, 2022 at 4:36 PM Clément Léger <clement.leger@...tlin.com> wrote:
> Add a PCS driver for the MII converter that is present on the Renesas
> RZ/N1 SoC. This MII converter is reponsible for converting MII to
> RMII/RGMII or act as a MII pass-trough. Exposing it as a PCS allows to
> reuse it in both the switch driver and the stmmac driver. Currently,
> this driver only allows the PCS to be used by the dual Cortex-A7
> subsystem since the register locking system is not used.
>
> Signed-off-by: Clément Léger <clement.leger@...tlin.com>

> --- a/drivers/net/pcs/Kconfig
> +++ b/drivers/net/pcs/Kconfig
> @@ -18,4 +18,11 @@ config PCS_LYNX
>           This module provides helpers to phylink for managing the Lynx PCS
>           which is part of the Layerscape and QorIQ Ethernet SERDES.
>
> +config PCS_RZN1_MIIC
> +       tristate "Renesas RZ/N1 MII converter"

depends on ARCH_RZN1 || COMPILE_TEST

> +       help
> +         This module provides a driver for the MII converter that is available
> +         on RZ/N1 SoCs. This PCS convert MII to RMII/RGMII or can be set in

converts

> +         pass-through mode for MII.
> +

> --- /dev/null
> +++ b/drivers/net/pcs/pcs-rzn1-miic.c

> +static int miic_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct miic *miic;
> +       u32 mode_cfg;
> +       int ret;
> +
> +       ret = miic_parse_dt(dev, &mode_cfg);
> +       if (ret < 0)
> +               return -EINVAL;
> +
> +       miic = devm_kzalloc(dev, sizeof(*miic), GFP_KERNEL);
> +       if (!miic)
> +               return -ENOMEM;
> +
> +       spin_lock_init(&miic->lock);
> +       miic->dev = dev;
> +       miic->base = devm_platform_ioremap_resource(pdev, 0);
> +       if (!miic->base)
> +               return -EINVAL;
> +
> +       miic->nclk = devm_clk_bulk_get_all(dev, &miic->clks);
> +       if (miic->nclk < 0)
> +               return miic->nclk;
> +
> +       ret = clk_bulk_prepare_enable(miic->nclk, miic->clks);
> +       if (ret)
> +               return ret;

As you don't seem to need any knowledge about the clocks' properties,
perhaps you can use Runtime PM instead?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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