lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Sun,  8 May 2022 11:53:13 -0700
From:   Colin Foster <colin.foster@...advantage.com>
To:     linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
        netdev@...r.kernel.org
Cc:     Terry Bowman <terry.bowman@....com>, Wolfram Sang <wsa@...nel.org>,
        Andy Shevchenko <andy.shevchenko@...il.com>,
        Steen Hegelund <Steen.Hegelund@...rochip.com>,
        Lars Povlsen <lars.povlsen@...rochip.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Russell King <linux@...linux.org.uk>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Paolo Abeni <pabeni@...hat.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Eric Dumazet <edumazet@...gle.com>,
        "David S. Miller" <davem@...emloft.net>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Andrew Lunn <andrew@...n.ch>, UNGLinuxDriver@...rochip.com,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Claudiu Manoil <claudiu.manoil@....com>,
        Vladimir Oltean <vladimir.oltean@....com>,
        Lee Jones <lee.jones@...aro.org>
Subject: [RFC v8 net-next 16/16] net: dsa: ocelot: utilize phylink_generic_validate

Utilize the phylink_generic_validate function to validate port interfaces
and speeds.

Signed-off-by: Colin Foster <colin.foster@...advantage.com>
---
 drivers/net/dsa/ocelot/ocelot_ext.c | 42 ++++++++++++++---------------
 1 file changed, 20 insertions(+), 22 deletions(-)

diff --git a/drivers/net/dsa/ocelot/ocelot_ext.c b/drivers/net/dsa/ocelot/ocelot_ext.c
index ba924f6b8d12..21a85e95c217 100644
--- a/drivers/net/dsa/ocelot/ocelot_ext.c
+++ b/drivers/net/dsa/ocelot/ocelot_ext.c
@@ -215,31 +215,28 @@ static void ocelot_ext_phylink_validate(struct ocelot *ocelot, int port,
 					unsigned long *supported,
 					struct phylink_link_state *state)
 {
-	struct ocelot_port *ocelot_port = ocelot->ports[port];
+	struct felix *felix = ocelot_to_felix(ocelot);
+	struct dsa_switch *ds = felix->ds;
+	struct phylink_config *pl_config;
+	struct dsa_port *dp;
 
-	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
+	dp = dsa_to_port(ds, port);
+	pl_config = &dp->pl_config;
 
-	if (state->interface != PHY_INTERFACE_MODE_NA &&
-	    state->interface != ocelot_port->phy_mode) {
-		bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
-		return;
-	}
+	phylink_generic_validate(pl_config, supported, state);
+}
+
+static void ocelot_ext_phylink_get_caps(struct ocelot *ocelot, int port,
+					struct phylink_config *pl_config)
+{
+	struct felix *felix = ocelot_to_felix(ocelot);
+
+	if (felix->info->port_modes[port] & OCELOT_PORT_MODE_INTERNAL)
+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
+			  pl_config->supported_interfaces);
 
-	phylink_set_port_modes(mask);
-
-	phylink_set(mask, Pause);
-	phylink_set(mask, Autoneg);
-	phylink_set(mask, Asym_Pause);
-	phylink_set(mask, 10baseT_Half);
-	phylink_set(mask, 10baseT_Full);
-	phylink_set(mask, 100baseT_Half);
-	phylink_set(mask, 100baseT_Full);
-	phylink_set(mask, 1000baseT_Half);
-	phylink_set(mask, 1000baseT_Full);
-
-	bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
-	bitmap_and(state->advertising, state->advertising, mask,
-		   __ETHTOOL_LINK_MODE_MASK_NBITS);
+	pl_config->mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | MAC_10 |
+				      MAC_100 | MAC_1000FD;
 }
 
 static struct regmap *ocelot_ext_regmap_init(struct ocelot *ocelot,
@@ -262,6 +259,7 @@ static const struct felix_info vsc7512_info = {
 	.phylink_validate		= ocelot_ext_phylink_validate,
 	.port_modes			= vsc7512_port_modes,
 	.init_regmap			= ocelot_ext_regmap_init,
+	.phylink_get_caps		= ocelot_ext_phylink_get_caps,
 };
 
 static int ocelot_ext_probe(struct platform_device *pdev)
-- 
2.25.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ