netdev - Re: [RFC v8 net-next 06/16] pinctrl: microchip-sgpio: add ability to be used in a non-mmio configuration

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20220509221931.GA895@COLIN-DESKTOP1.localdomain>
Date:   Mon, 9 May 2022 15:19:31 -0700
From:   Colin Foster <colin.foster@...advantage.com>
To:     Andy Shevchenko <andy.shevchenko@...il.com>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
        netdev@...r.kernel.org, Terry Bowman <terry.bowman@....com>,
        Wolfram Sang <wsa@...nel.org>,
        Steen Hegelund <Steen.Hegelund@...rochip.com>,
        Lars Povlsen <lars.povlsen@...rochip.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Russell King <linux@...linux.org.uk>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Paolo Abeni <pabeni@...hat.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Eric Dumazet <edumazet@...gle.com>,
        "David S. Miller" <davem@...emloft.net>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Andrew Lunn <andrew@...n.ch>, UNGLinuxDriver@...rochip.com,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Claudiu Manoil <claudiu.manoil@....com>,
        Vladimir Oltean <vladimir.oltean@....com>,
        Lee Jones <lee.jones@...aro.org>
Subject: Re: [RFC v8 net-next 06/16] pinctrl: microchip-sgpio: add ability to
 be used in a non-mmio configuration

Hi Andy,

On Mon, May 09, 2022 at 10:44:42AM +0200, Andy Shevchenko wrote:
> On Sun, May 8, 2022 at 8:53 PM Colin Foster
> <colin.foster@...advantage.com> wrote:
> >
> > There are a few Ocelot chips that can contain SGPIO logic, but can be
> > controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In
> > the externally controlled configurations these registers are not
> > memory-mapped.
> >
> > Add support for these non-memory-mapped configurations.
> 
> ...
> 
> > -       regs = devm_platform_ioremap_resource(pdev, 0);
> > -       if (IS_ERR(regs))
> > -               return PTR_ERR(regs);
> > +       regs = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
> > +       if (IS_ERR(regs)) {
> > +               /*
> > +                * Fall back to using IORESOURCE_REG, which is possible in an
> > +                * MFD configuration
> > +                */
> > +               res = platform_get_resource(pdev, IORESOURCE_REG, 0);
> > +               if (!res) {
> > +                       dev_err(dev, "Failed to get resource\n");
> > +                       return -ENODEV;
> > +               }
> > +
> > +               priv->regs = ocelot_init_regmap_from_resource(dev, res);
> > +       } else {
> > +               priv->regs = devm_regmap_init_mmio(dev, regs, &regmap_config);
> > +       }
> >
> > -       priv->regs = devm_regmap_init_mmio(dev, regs, &regmap_config);
> >         if (IS_ERR(priv->regs))
> >                 return PTR_ERR(priv->regs);
> 
> This looks like repetition of something you have done in a few
> previous patches. Can you avoid code duplication by introducing a
> corresponding helper function?

That's a good idea. Thanks for the feedback!

> 
> -- 
> With Best Regards,
> Andy Shevchenko