netdev - Re: [PATCH v3 2/5] ravb: Separate handling of irq enable/disable regs into feature

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Message-ID: <86eb5131-5a0f-5bf0-b884-747a0617af41@omp.ru>
Date:   Tue, 10 May 2022 17:05:24 +0300
From:   Sergey Shtylyov <s.shtylyov@....ru>
To:     Phil Edworthy <phil.edworthy@...esas.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>
CC:     Geert Uytterhoeven <geert+renesas@...der.be>,
        Biju Das <biju.das.jz@...renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        <netdev@...r.kernel.org>, <linux-renesas-soc@...r.kernel.org>
Subject: Re: [PATCH v3 2/5] ravb: Separate handling of irq enable/disable regs
 into feature

On 5/10/22 12:03 PM, Phil Edworthy wrote:

> Currently, when the HW has a single interrupt, the driver uses the
> GIC, TIC, RIC0 registers to enable and disable interrupts.
> When the HW has multiple interrupts, it uses the GIE, GID, TIE, TID,
> RIE0, RID0 registers.
> 
> However, other devices, e.g. RZ/V2M, have multiple irqs and only have
> the GIC, TIC, RIC0 registers.
> Therefore, split this into a separate feature.
> 
> Signed-off-by: Phil Edworthy <phil.edworthy@...esas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>

Reviewed-by: Sergey Shtylyov <s.shtylyov@....ru>

[...]

MBR, Sergey