netdev - Re: [PATCH v4 1/3] dt-bindings: net: adin: document phy clock

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Message-ID: <c457047dd2af8fc0db69d815db981d61@walle.cc>
Date:   Wed, 11 May 2022 19:10:36 +0200
From:   Michael Walle <michael@...le.cc>
To:     Jakub Kicinski <kuba@...nel.org>
Cc:     alexandru.ardelean@...log.com, alvaro.karsz@...id-run.com,
        davem@...emloft.net, edumazet@...gle.com, josua@...id-run.com,
        krzysztof.kozlowski+dt@...aro.org, michael.hennerich@...log.com,
        netdev@...r.kernel.org, pabeni@...hat.com, robh+dt@...nel.org
Subject: Re: [PATCH v4 1/3] dt-bindings: net: adin: document phy clock

Am 2022-05-11 18:11, schrieb Jakub Kicinski:
> On Wed, 11 May 2022 14:58:55 +0200 Michael Walle wrote:
>> > I'm still not convinced that exposing the free running vs recovered
>> > distinction from the start is a good idea. Intuitively it'd seem that
>> > it's better to use the recovered clock to feed the wire side of the MAC,
>> > this patch set uses the free running. So I'd personally strip the last
>> > part off and add it later if needed.
>> 
>> FWIW, the recovered clock only works if there is a link. AFAIR on the
>> AR8031 you can have the free-running one enabled even if there is no
>> link, which might sometimes be useful.
> 
> Is that true for all PHYs? I've seen "larger" devices mention holdover
> or some other form of automatic fallback in the DPLL if input clock is
> lost.

I certainly can't speak of 'all' PHYs, who can ;) But how is the
switchover for example? hitless? will there be a brief period of
no clock at all?

The point I wanted to add is that the user should have the choice or
at least you should clearly mention that. If you drop the suffix and 
just
use "25mhz" is that now the recovered one or the free-running one. And
why is that one preferred over the other? Eg. if I were a designer for a
cheapo board and I'd need a 125MHz clock and want to save some bucks
for the 125MHz osc and the PHY could supply one, I'd use the
free-running mode. Just to avoid any surprises with a switchover
or whatever.

> I thought that's the case here, too:
> 
>> > > +      The phy can also automatically switch between the reference and the
>> > > +      respective 125MHz clocks based on its internal state.

I read "reference" as being the 25MHz (maybe when the PHY is in 10Mbit
mode? I didn't read the datasheet) because the first mode is called
25mhz-reference. So it might be switching between 25MHz and 125MHz?
I don't know.

-michael