netdev - Re: [PATCH v3 4/5] ravb: Use separate clock for gPTP

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Date:   Thu, 12 May 2022 10:59:02 +0300
From:   Sergey Shtylyov <s.shtylyov@....ru>
To:     Paolo Abeni <pabeni@...hat.com>,
        Phil Edworthy <phil.edworthy@...esas.com>,
        "David S. Miller" <davem@...emloft.net>,
        "Eric Dumazet" <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>
CC:     Geert Uytterhoeven <geert+renesas@...der.be>,
        Biju Das <biju.das.jz@...renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        <netdev@...r.kernel.org>, <linux-renesas-soc@...r.kernel.org>
Subject: Re: [PATCH v3 4/5] ravb: Use separate clock for gPTP

On 5/12/22 10:02 AM, Paolo Abeni wrote:

>> RZ/V2M has a separate gPTP reference clock that is used when the
>> AVB-DMAC Mode Register (CCC) gPTP Clock Select (CSEL) bits are
>> set to "01: High-speed peripheral bus clock".
>> Therefore, add a feature that allows this clock to be used for
>> gPTP.
>>
>> Signed-off-by: Phil Edworthy <phil.edworthy@...esas.com>
>> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
>> Reviewed-by: Sergey Shtylyov <s.shtylyov@....ru>

[...]
>> diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
>> index 8ccc817b8b5d..ef6967731263 100644
>> --- a/drivers/net/ethernet/renesas/ravb_main.c
>> +++ b/drivers/net/ethernet/renesas/ravb_main.c
[...]
>> @@ -2721,6 +2725,15 @@ static int ravb_probe(struct platform_device *pdev)
>>  	}
>>  	clk_prepare_enable(priv->refclk);
>>  
>> +	if (info->gptp_ref_clk) {
>> +		priv->gptp_clk = devm_clk_get(&pdev->dev, "gptp");
>> +		if (IS_ERR(priv->gptp_clk)) {
>> +			error = PTR_ERR(priv->gptp_clk);
>> +			goto out_release;
>> +		}
>> +		clk_prepare_enable(priv->gptp_clk);
>> +	}
>> +
> 
> I guess you need to a conditional
> 
> 	clk_disable_unprepare(info->gptp_ref_clk)
> 
> in the error path? And even in ravb_remove()?

   Indeed! How could I miss it? :-/

[...]

MBR, Sergey