netdev - Re: [PATCH v5 1/3] dt-bindings: net: adin: document phy clock output properties

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Message-ID: <6b856ede-88e8-f589-e31a-4ba91ff67317@linaro.org>
Date:   Tue, 17 May 2022 11:20:28 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Josua Mayer <josua@...id-run.com>, netdev@...r.kernel.org
Cc:     alvaro.karsz@...id-run.com,
        Michael Hennerich <michael.hennerich@...log.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Alexandru Ardelean <alexandru.ardelean@...log.com>
Subject: Re: [PATCH v5 1/3] dt-bindings: net: adin: document phy clock output
 properties

On 17/05/2022 10:54, Josua Mayer wrote:
> The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
> well as providing the reference clock on CLK25_REF.
> 
> Add DT properties to configure both pins.
> 
> Technically the phy also supports a recovered 125MHz clock for
> synchronous ethernet. However SyncE should be configured dynamically at
> runtime, so it is explicitly omitted in this binding.
> 
> Signed-off-by: Josua Mayer <josua@...id-run.com>


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

No need to remove my tag, please keep it.


Best regards,
Krzysztof