[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220531113058.23708-2-s-vadapalli@ti.com>
Date: Tue, 31 May 2022 17:00:56 +0530
From: Siddharth Vadapalli <s-vadapalli@...com>
To: <davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
<pabeni@...hat.com>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <linux@...linux.org.uk>,
<vladimir.oltean@....com>, <grygorii.strashko@...com>,
<vigneshr@...com>, <nsekhar@...com>
CC: <netdev@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <kishon@...com>,
Siddharth Vadapalli <s-vadapalli@...com>
Subject: [PATCH 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J7200 CPSW5G
Update bindings for TI K3 J7200 SoC which contains 5 ports (4 external
ports) in order to support CPSW5G.
Changes made:
- Change pattern properties to support 4 ports.
- Change maximum number of CPSW ports to 4.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com>
---
.../devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
index b8281d8be940..f9e6eb600b41 100644
--- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
+++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
@@ -110,7 +110,7 @@ properties:
const: 0
patternProperties:
- port@[1-2]:
+ port@[1-4]:
type: object
description: CPSWxG NUSS external ports
@@ -119,7 +119,7 @@ properties:
properties:
reg:
minimum: 1
- maximum: 2
+ maximum: 4
description: CPSW port number
phys:
--
2.36.1
Powered by blists - more mailing lists