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Message-ID: <Ypwh8e0jdQPVyJVq@lunn.ch>
Date: Sun, 5 Jun 2022 05:24:33 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Piyush Malgujar <pmalgujar@...vell.com>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
krzysztof.kozlowski+dt@...aro.org, devicetree@...r.kernel.org,
cchavva@...vell.com, deppel@...vell.com,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>
Subject: Re: [PATCH v2 3/3] net: mdio: mdio-thunder: support for clock-freq
attribute
> +static inline u32 clk_freq(u32 phase)
Please keep with the naming scheme in the rest of the driver,
thunder_mdiobus_clk_freq()
> +{
> + return (100000000U / (2 * (phase)));
> +}
> +
> +static inline u32 calc_sample(u32 phase)
> +{
thunder_mdiobus_calc_sample()
> + return (2 * (phase) - 3);
> +}
> +
> +static u32 _config_clk(u32 req_freq, u32 *phase, u32 *sample)
thunder_mdiobus_config_clk().
> +{
> + unsigned int p;
> + u32 freq = 0, freq_prev;
> +
> + for (p = PHASE_MIN; p < PHASE_DFLT; p++) {
> + freq_prev = freq;
> + freq = clk_freq(p);
> +
> + if (req_freq >= freq)
> + break;
> + }
> +
> + if (p == PHASE_DFLT)
> + freq = clk_freq(PHASE_DFLT);
> +
> + if (p == PHASE_MIN || p == PHASE_DFLT)
> + goto out;
> +
> + /* Check which clock value from the identified range
> + * is closer to the requested value
> + */
> + if ((freq_prev - req_freq) < (req_freq - freq)) {
> + p = p - 1;
> + freq = freq_prev;
> + }
> +out:
> + *phase = p;
> + *sample = calc_sample(p);
> + return freq;
> +}
> +
> static int thunder_mdiobus_pci_probe(struct pci_dev *pdev,
> const struct pci_device_id *ent)
> {
> @@ -56,6 +101,7 @@ static int thunder_mdiobus_pci_probe(struct pci_dev *pdev,
> i = 0;
> device_for_each_child_node(&pdev->dev, fwn) {
> struct resource r;
> + u32 req_clk_freq;
> struct mii_bus *mii_bus;
> struct cavium_mdiobus *bus;
> union cvmx_smix_clk smi_clk;
> @@ -90,6 +136,23 @@ static int thunder_mdiobus_pci_probe(struct pci_dev *pdev,
>
> smi_clk.u64 = oct_mdio_readq(bus->register_base + SMI_CLK);
> smi_clk.s.clk_idle = 1;
> +
> + if (!of_property_read_u32(node, "clock-frequency", &req_clk_freq)) {
> + u32 phase, sample;
> +
> + dev_dbg(&pdev->dev, "requested bus clock frequency=%d\n",
> + req_clk_freq);
> +
> + bus->clk_freq = _config_clk(req_clk_freq,
> + &phase, &sample);
> +
> + smi_clk.s.phase = phase;
> + smi_clk.s.sample_hi = (sample >> 4) & 0x1f;
> + smi_clk.s.sample = sample & 0xf;
> + } else {
> + bus->clk_freq = clk_freq(PHASE_DFLT);
> + }
You can make this simpler by setting req_clk_freq to your odd
default. Then call of_property_read_u32(). If the property is not
defined, the value of req_clk_freq will not be changed, and the
calculation should come out with the correct value.
Andrew
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