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Message-Id: <20220618062300.28541-2-ansuelsmth@gmail.com>
Date: Sat, 18 Jun 2022 08:22:59 +0200
From: Christian Marangi <ansuelsmth@...il.com>
To: Andrew Lunn <andrew@...n.ch>,
Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Jonathan McDowell <noodles@...th.li>, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Christian Marangi <ansuelsmth@...il.com>
Subject: [PATCH 2/3] net: dsa: qca8k: change only max_frame_size of mac_frame_size_reg
Currently we overwrite the entire MAX_FRAME_SIZE reg instead of tweaking
just the MAX_FRAME_SIZE value. Change this and update only the relevant
bits.
Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
---
drivers/net/dsa/qca8k.c | 8 ++++++--
drivers/net/dsa/qca8k.h | 3 ++-
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 2727d3169c25..eaaf80f96fa9 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -2345,7 +2345,9 @@ qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
return 0;
/* Include L2 header / FCS length */
- return qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, new_mtu + ETH_HLEN + ETH_FCS_LEN);
+ return regmap_update_bits(priv->regmap, QCA8K_MAX_FRAME_SIZE_REG,
+ QCA8K_MAX_FRAME_SIZE_MASK,
+ new_mtu + ETH_HLEN + ETH_FCS_LEN);
}
static int
@@ -3015,7 +3017,9 @@ qca8k_setup(struct dsa_switch *ds)
}
/* Setup our port MTUs to match power on defaults */
- ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN);
+ ret = regmap_update_bits(priv->regmap, QCA8K_MAX_FRAME_SIZE_REG,
+ QCA8K_MAX_FRAME_SIZE_MASK,
+ ETH_FRAME_LEN + ETH_FCS_LEN);
if (ret)
dev_warn(priv->dev, "failed setting MTU settings");
diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h
index ec58d0e80a70..1d0c383a95e7 100644
--- a/drivers/net/dsa/qca8k.h
+++ b/drivers/net/dsa/qca8k.h
@@ -87,7 +87,8 @@
#define QCA8K_MDIO_MASTER_MAX_REG 32
#define QCA8K_GOL_MAC_ADDR0 0x60
#define QCA8K_GOL_MAC_ADDR1 0x64
-#define QCA8K_MAX_FRAME_SIZE 0x78
+#define QCA8K_MAX_FRAME_SIZE_REG 0x78
+#define QCA8K_MAX_FRAME_SIZE_MASK GENMASK(13, 0)
#define QCA8K_REG_PORT_STATUS(_i) (0x07c + (_i) * 4)
#define QCA8K_PORT_STATUS_SPEED GENMASK(1, 0)
#define QCA8K_PORT_STATUS_SPEED_10 0
--
2.36.1
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