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Message-ID: <20220621223315.60b657f4@kernel.org>
Date:   Tue, 21 Jun 2022 22:33:15 -0700
From:   Jakub Kicinski <kuba@...nel.org>
To:     bhelgaas@...gle.com
Cc:     Jiawen Wu <jiawenwu@...stnetic.com>, netdev@...r.kernel.org,
        linux-pci@...r.kernel.org
Subject: Re: [PATCH net-next v7] net: txgbe: Add build support for txgbe

On Tue, 21 Jun 2022 10:32:09 +0800 Jiawen Wu wrote:
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -5942,3 +5942,18 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x56b1, aspm_l1_acceptable_latency
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x56c0, aspm_l1_acceptable_latency);
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x56c1, aspm_l1_acceptable_latency);
>  #endif
> +
> +static void quirk_wangxun_set_read_req_size(struct pci_dev *pdev)
> +{
> +	u16 ctl;
> +
> +	pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &ctl);
> +
> +	if (((ctl & PCI_EXP_DEVCTL_READRQ) != PCI_EXP_DEVCTL_READRQ_128B) &&
> +	    ((ctl & PCI_EXP_DEVCTL_READRQ) != PCI_EXP_DEVCTL_READRQ_256B))
> +		pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
> +						   PCI_EXP_DEVCTL_READRQ,
> +						   PCI_EXP_DEVCTL_READRQ_256B);
> +}
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WANGXUN, PCI_ANY_ID,
> +			 quirk_wangxun_set_read_req_size);

Hi Bjorn! Other than the fact that you should obviously have been CCed
on the patch [1] - what are the general rules on the quirks? Should
this be sent separately to your PCI tree?

[1]
https://lore.kernel.org/all/20220621023209.599386-1-jiawenwu@trustnetic.com/

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