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Date:   Thu, 23 Jun 2022 10:02:21 +0200
From:   Clément Léger <clement.leger@...tlin.com>
To:     Vladimir Oltean <olteanv@...il.com>
Cc:     Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Jose Abreu <joabreu@...opsys.com>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Herve Codina <herve.codina@...tlin.com>,
        Miquèl Raynal <miquel.raynal@...tlin.com>,
        Milan Stevanovic <milan.stevanovic@...com>,
        Jimmy Lalande <jimmy.lalande@...com>,
        Pascal Eberhard <pascal.eberhard@...com>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [PATCH net-next v8 15/16] ARM: dts: r9a06g032-rzn1d400-db: add
 switch description

Le Tue, 21 Jun 2022 14:56:03 +0300,
Vladimir Oltean <olteanv@...il.com> a écrit :

> On Mon, Jun 20, 2022 at 01:08:45PM +0200, Clément Léger wrote:
> > Add description for the switch, GMAC2 and MII converter. With these
> > definitions, the switch port 0 and 1 (MII port 5 and 4) are working on
> > RZ/N1D-DB board.
> > 
> > Signed-off-by: Clément Léger <clement.leger@...tlin.com>
> > ---  
> 
> Reviewed-by: Vladimir Oltean <olteanv@...il.com>
> 
> Just minor comments below:
> 
> >  arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts | 117 ++++++++++++++++++++
> >  1 file changed, 117 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
> > index 3f8f3ce87e12..36b898d9f115 100644
> > --- a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
> > +++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
> > @@ -8,6 +8,8 @@
> >  
> >  /dts-v1/;
> >  
> > +#include <dt-bindings/pinctrl/rzn1-pinctrl.h>
> > +#include <dt-bindings/net/pcs-rzn1-miic.h>
> >  #include "r9a06g032.dtsi"
> >  
> >  / {
> > @@ -31,3 +33,118 @@ &wdt0 {
> >  	timeout-sec = <60>;
> >  	status = "okay";
> >  };
> > +
> > +&gmac2 {
> > +	status = "okay";
> > +	phy-mode = "gmii";
> > +	fixed-link {
> > +		speed = <1000>;
> > +		full-duplex;
> > +	};
> > +};
> > +
> > +&switch {
> > +	status = "okay";
> > +	#address-cells = <1>;
> > +	#size-cells = <0>;
> > +
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pins_mdio1>, <&pins_eth3>, <&pins_eth4>;
> > +
> > +	dsa,member = <0 0>;  
> 
> This doesn't really have any value for single-switch DSA trees, since
> that is the implicit tree id/switch id, but it doesn't hurt, either.

Ok, let's remove it then if it's useless.

> 
> > +
> > +	mdio {
> > +		clock-frequency = <2500000>;
> > +
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +
> > +		switch0phy4: ethernet-phy@4{  
> 
> Space between ethernet-phy@4 and {.
> 
> > +			reg = <4>;
> > +			micrel,led-mode = <1>;
> > +		};
> > +
> > +		switch0phy5: ethernet-phy@5{  
> 
> Same thing here.

Acked

-- 
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com

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