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Message-Id: <20220628221404.1444200-35-sean.anderson@seco.com>
Date: Tue, 28 Jun 2022 18:14:03 -0400
From: Sean Anderson <sean.anderson@...o.com>
To: "David S . Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Madalin Bucur <madalin.bucur@....com>, netdev@...r.kernel.org
Cc: Russell King <linux@...linux.org.uk>,
Paolo Abeni <pabeni@...hat.com>,
linux-arm-kernel@...ts.infradead.org,
Eric Dumazet <edumazet@...gle.com>,
linux-kernel@...r.kernel.org,
Sean Anderson <sean.anderson@...o.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Li Yang <leoyang.li@....com>, Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>, devicetree@...r.kernel.org
Subject: [PATCH net-next v2 34/35] arm64: dts: ls1046a: Add serdes bindings
This adds bindings for the SerDes devices. They are disabled by default
to prevent any breakage on existing boards.
Signed-off-by: Sean Anderson <sean.anderson@...o.com>
---
Changes in v2:
- Disable SerDes by default to prevent breaking boards inadvertently.
- Use one phy cell for SerDes1, since no lanes can be grouped
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 0085e83adf65..8b15653607c9 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -413,6 +413,22 @@ bportals: bman-portals@...000000 {
ranges = <0x0 0x5 0x08000000 0x8000000>;
};
+ serdes1: phy@...0000 {
+ #clock-cells = <1>;
+ #phy-cells = <1>;
+ compatible = "fsl,ls1046a-serdes-1";
+ reg = <0x0 0x1ea0000 0x0 0x2000>;
+ status = "disabled";
+ };
+
+ serdes2: phy@...0000 {
+ #clock-cells = <1>;
+ #phy-cells = <2>;
+ compatible = "fsl,ls1046a-serdes-2";
+ reg = <0x0 0x1eb0000 0x0 0x2000>;
+ status = "disabled";
+ };
+
dcfg: dcfg@...0000 {
compatible = "fsl,ls1046a-dcfg", "syscon";
reg = <0x0 0x1ee0000 0x0 0x1000>;
--
2.35.1.1320.gc452695387.dirty
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