lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Fri, 1 Jul 2022 12:26:06 -0700 From: Colin Foster <colin.foster@...advantage.com> To: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org Cc: Vladimir Oltean <vladimir.oltean@....com>, Lee Jones <lee.jones@...aro.org>, Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>, Russell King <linux@...linux.org.uk>, "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Lars Povlsen <lars.povlsen@...rochip.com>, Steen Hegelund <Steen.Hegelund@...rochip.com>, UNGLinuxDriver@...rochip.com, Linus Walleij <linus.walleij@...aro.org>, Wolfram Sang <wsa@...nel.org>, Terry Bowman <terry.bowman@....com>, Andy Shevchenko <andy.shevchenko@...il.com>, katie.morris@...advantage.com Subject: [PATCH v12 net-next 6/9] pinctrl: microchip-sgpio: add ability to be used in a non-mmio configuration There are a few Ocelot chips that can contain SGPIO logic, but can be controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In the externally controlled configurations these registers are not memory-mapped. Add support for these non-memory-mapped configurations. Signed-off-by: Colin Foster <colin.foster@...advantage.com> --- drivers/pinctrl/pinctrl-microchip-sgpio.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c index e56074b7e659..2b4167a09b3b 100644 --- a/drivers/pinctrl/pinctrl-microchip-sgpio.c +++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c @@ -12,6 +12,7 @@ #include <linux/clk.h> #include <linux/gpio/driver.h> #include <linux/io.h> +#include <linux/mfd/ocelot.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/pinctrl/pinmux.h> @@ -904,7 +905,6 @@ static int microchip_sgpio_probe(struct platform_device *pdev) struct reset_control *reset; struct sgpio_priv *priv; struct clk *clk; - u32 __iomem *regs; u32 val; struct regmap_config regmap_config = { .reg_bits = 32, @@ -937,11 +937,7 @@ static int microchip_sgpio_probe(struct platform_device *pdev) return -EINVAL; } - regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(regs)) - return PTR_ERR(regs); - - priv->regs = devm_regmap_init_mmio(dev, regs, ®map_config); + priv->regs = ocelot_regmap_from_resource(pdev, 0, ®map_config); if (IS_ERR(priv->regs)) return PTR_ERR(priv->regs); -- 2.25.1
Powered by blists - more mailing lists