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Date:   Thu, 7 Jul 2022 08:56:49 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Thierry Reding <thierry.reding@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     Jon Hunter <jonathanh@...dia.com>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Bhadram Varka <vbhadram@...dia.com>,
        devicetree@...r.kernel.org, linux-tegra@...r.kernel.org,
        netdev@...r.kernel.org
Subject: Re: [PATCH v3 5/9] dt-bindings: net: Add Tegra234 MGBE

On 06/07/2022 23:32, Thierry Reding wrote:
> From: Bhadram Varka <vbhadram@...dia.com>
> 
> Add device-tree binding documentation for the Multi-Gigabit Ethernet
> (MGBE) controller found on NVIDIA Tegra234 SoCs.
> 
> Signed-off-by: Jon Hunter <jonathanh@...dia.com>
> Signed-off-by: Bhadram Varka <vbhadram@...dia.com>
> Signed-off-by: Thierry Reding <treding@...dia.com>
> ---
> Changes in v3:
> - add macsec and macsec-ns interrupt names
> - improve mdio bus node description
> - drop power-domains description
> - improve bindings title
> 
> Changes in v2:
> - add supported PHY modes
> - change to dual license
> 
>  .../bindings/net/nvidia,tegra234-mgbe.yaml    | 169 ++++++++++++++++++
>  1 file changed, 169 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml b/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml
> new file mode 100644
> index 000000000000..3d242ef1ca57
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml
> @@ -0,0 +1,169 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Tegra234 MGBE Multi-Gigabit Ethernet Controller
> +
> +maintainers:
> +  - Thierry Reding <treding@...dia.com>
> +  - Jon Hunter <jonathanh@...dia.com>
> +
> +properties:
> +

Drop the blank line.

> +  compatible:
> +    const: nvidia,tegra234-mgbe
> +
> +  reg:
> +    minItems: 3

Drop minitems (equal to maxItems)

> +    maxItems: 3
> +
> +  reg-names:
> +    items:
> +      - const: hypervisor
> +      - const: mac
> +      - const: xpcs
> +
> +  interrupts:
> +    minItems: 1

You need maxItems:3

> +
> +  interrupt-names:
> +    minItems: 1
> +    items:
> +      - const: common
> +      - const: macsec-ns
> +      - const: macsec
> +
> +  clocks:
> +    minItems: 12

Drop minItems

> +    maxItems: 12
> +
> +  clock-names:
> +    minItems: 12
> +    maxItems: 12

Drop min/max and instead list the clocks in fixed order.. The order is
always fixed, so below enum is not correct.

> +    contains:
> +      enum:
> +        - mgbe
> +        - mac
> +        - mac-divider
> +        - ptp-ref
> +        - rx-input-m
> +        - rx-input
> +        - tx
> +        - eee-pcs
> +        - rx-pcs-input
> +        - rx-pcs-m
> +        - rx-pcs
> +        - tx-pcs
> +
> +  resets:
> +    minItems: 2

Drop minItems.

> +    maxItems: 2
> +
> +  reset-names:
> +    contains:
> +      enum:

Same problem.

> +        - mac
> +        - pcs
> +
> +  interconnects:
> +    items:
> +      - description: memory read client
> +      - description: memory write client
> +
> +  interconnect-names:
> +    items:
> +      - const: dma-mem # read

I propose to drop the comment - it is obvious from "interconnects" above.


Best regards,
Krzysztof

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