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Message-Id: <20220718180109.4114540-3-anthony.l.nguyen@intel.com>
Date: Mon, 18 Jul 2022 11:01:08 -0700
From: Tony Nguyen <anthony.l.nguyen@...el.com>
To: davem@...emloft.net, kuba@...nel.org, pabeni@...hat.com,
edumazet@...gle.com
Cc: Sasha Neftin <sasha.neftin@...el.com>, netdev@...r.kernel.org,
anthony.l.nguyen@...el.com,
Naama Meir <naamax.meir@...ux.intel.com>
Subject: [PATCH net-next 2/3] igc: Remove MSI-X PBA Clear register
From: Sasha Neftin <sasha.neftin@...el.com>
MSI-X PBA Clear register is not used. This patch comes to tidy up the
driver code.
Signed-off-by: Sasha Neftin <sasha.neftin@...el.com>
Tested-by: Naama Meir <naamax.meir@...ux.intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@...el.com>
---
drivers/net/ethernet/intel/igc/igc_regs.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/net/ethernet/intel/igc/igc_regs.h b/drivers/net/ethernet/intel/igc/igc_regs.h
index e197a33d93a0..d06018150764 100644
--- a/drivers/net/ethernet/intel/igc/igc_regs.h
+++ b/drivers/net/ethernet/intel/igc/igc_regs.h
@@ -59,9 +59,6 @@
#define IGC_IVAR_MISC 0x01740 /* IVAR for "other" causes - RW */
#define IGC_GPIE 0x01514 /* General Purpose Intr Enable - RW */
-/* MSI-X Table Register Descriptions */
-#define IGC_PBACL 0x05B68 /* MSIx PBA Clear - R/W 1 to clear */
-
/* RSS registers */
#define IGC_MRQC 0x05818 /* Multiple Receive Control - RW */
--
2.35.1
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