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Date:   Mon, 18 Jul 2022 12:40:03 +0200
From:   Matej Vasilevski <>
To:     Marc Kleine-Budde <>
Cc:     Appana Durga Kedareswara rao <>,
        Naga Sureshkumar Relli <>,
        Wolfgang Grandegger <>,,,
        Martin Jerabek <>
Subject: Re: [PATCH] can: xilinx_can: add support for RX timestamps on Zynq

On Mon, Jul 18, 2022 at 10:33:12AM +0200, Marc Kleine-Budde wrote:
> On 16.07.2022 14:04:09, Matej Vasilevski wrote:
> > This patch adds support for hardware RX timestamps from Xilinx Zynq CAN
> > controllers. The timestamp is calculated against a timepoint reference
> > stored when the first CAN message is received.
> > 
> > When CAN bus traffic does not contain long idle pauses (so that
> > the clocks would drift by a multiple of the counter rollover time),
> > then the hardware timestamps provide precise relative time between
> > received messages. This can be used e.g. for latency testing.
> Please make use of the existing cyclecounter/timecounter framework. Is
> there a way to read the current time from a register? If so, please
> setup a worker that does that regularly.
> Have a look at the mcp251xfd driver as an example:

Hi Marc,

as Pavel have said, the counter register isn't readable.

I'll try to fit the timecounter/cyclecounter framework and send a v2
patch if it works well. Thanks for the suggestion, it didn't occur to me
that I can use it in this case as well.


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