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Message-ID: <20220725165312.59471-1-alexandru.tachici@analog.com>
Date:   Mon, 25 Jul 2022 19:53:09 +0300
From:   <alexandru.tachici@...log.com>
To:     <netdev@...r.kernel.org>
CC:     <davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
        <devicetree@...r.kernel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <gerhard@...leder-embedded.com>, <geert+renesas@...der.be>,
        <joel@....id.au>, <stefan.wahren@...e.com>, <wellslutw@...il.com>,
        <geert@...ux-m68k.org>, <robh+dt@...nel.org>,
        <d.michailidis@...gible.com>, <stephen@...workplumber.org>,
        <l.stelmach@...sung.com>, <linux-kernel@...r.kernel.org>
Subject: [net-next v2 0/3] net: ethernet: adi: Add ADIN1110 support

From: Alexandru Tachici <alexandru.tachici@...log.com>

The ADIN1110 is a low power single port 10BASE-T1L MAC-PHY
designed for industrial Ethernet applications. It integrates
an Ethernet PHY core with a MAC and all the associated analog
circuitry, input and output clock buffering.

ADIN1110 MAC-PHY encapsulates the ADIN1100 PHY. The PHY registers
can be accessed through the MDIO MAC registers.
We are registering an MDIO bus with custom read/write in order
to let the PHY to be discovered by the PAL. This will let
the ADIN1100 Linux driver to probe and take control of
the PHY.

The ADIN2111 is a low power, low complexity, two-Ethernet ports
switch with integrated 10BASE-T1L PHYs and one serial peripheral
interface (SPI) port.

The device is designed for industrial Ethernet applications using
low power constrained nodes and is compliant with the IEEE 802.3cg-2019
Ethernet standard for long reach 10 Mbps single pair Ethernet (SPE).
The switch supports various routing configurations between
the two Ethernet ports and the SPI host port providing a flexible
solution for line, daisy-chain, or ring network topologies.

The ADIN2111 supports cable reach of up to 1700 meters with ultra
low power consumption of 77 mW. The two PHY cores support the
1.0 V p-p operating mode and the 2.4 V p-p operating mode defined
in the IEEE 802.3cg standard.

The device integrates the switch, two Ethernet physical layer (PHY)
cores with a media access control (MAC) interface and all the
associated analog circuitry, and input and output clock buffering.

The device also includes internal buffer queues, the SPI and
subsystem registers, as well as the control logic to manage the reset
and clock control and hardware pin configuration.

Access to the PHYs is exposed via an internal MDIO bus. Writes/reads
can be performed by reading/writing to the ADIN2111 MDIO registers
via SPI.

On probe, for each port, a struct net_device is allocated and
registered. When both ports are added to the same bridge, the driver
will enable offloading of frame forwarding at the hardware level.

Driver offers STP support. Normal operation on forwarding state.
Allows only frames with the 802.1d DA to be passed to the host
when in any of the other states.

Supports both VEB and VEPA modes. In VEB mode multicast/broadcast
and unknown frames are handled by the ADIN2111, sw bridge will
not see them (this is to save SPI bandwidth). In VEPA mode,
all forwarding will be handled by the sw bridge, ADIN2111 will
not attempt to forward any frames in hardware to the other port.

Alexandru Tachici (3):
  net: phy: adin1100: add PHY IDs of adin1110/adin2111
  net: ethernet: adi: Add ADIN1110 support
  dt-bindings: net: adin1110: Add docs

Changelog V1 -> V2:
adin1100.c:
	- added additional PHY IDs that are found in both the ADIN1110 and ADIN2111 ICs

adin1110.c:
	- fixed warnings when built with W=1
	- in adin1110_irq(): check status register read return value before moving on
	- call adin1110_read_frames() with a fixed budget to avoid running forever in the loop
	- in adin1110_port_bridge_join(): removed if() that checks if same port was
	added to multiple bridges, core already does that
	- phy_connect() now called with PHY_INTERFACE_MODE_INTERNAL instead
	- replaced dev_err() dev_err_ratelimited() in places where could flood log
	- set spi->mode to SPI_MODE_0
	- on PHY_ID check also print expected PHY_ID
	- removed lock/unlock from adin1110_ndo_get_stats64()
	- removed rx_errors/rx_dropped/multicast counters updates for now. Those need
	SPI register reads in order to be accessed.
	- replaced mutex_unlocks() + return with gotos and a single mutex_unlock()
	- in adin1110_rx_mode_work(): check port_priv->flags for IFF_BROADCAST in order to
	enable/disable RX broadcast frames
	- allow promiscuous mode for ADIN2111. In this way, when added to a bridge, CPU will see
	the frames with an unknown destination address
	- in adin1110_rx_mode_work: also check if hw forwarding offloading can be enabled
	- added STP support
	- added VEB/VEPA support (ADIN2111). VEB can be used to allow the hardware to
	offload forwarding thus decreasing the amount of SPI talk, but with disregard
	to VLAN tags (hardware is oblivious to those). Also in VEB mode host will
	receive only multicast/broadcast or host MAC address.
	VEPA allows the bridge to handle all forwarding. ADIN2111 will not attempt to forward
	in hardware any type of frame.

adi,adin1110.yaml:
	- Removed comas from $id and $schema
	- Removed spi-controller from ref:
	- Removed patternProperties for PHYs. No need to specify PHY IDs.
	Phylib probes required drivers anyway based on the IDs found on the registered MDIO bus.
	- Updated DT example

 .../devicetree/bindings/net/adi,adin1110.yaml |   81 +
 drivers/net/ethernet/Kconfig                  |    1 +
 drivers/net/ethernet/Makefile                 |    1 +
 drivers/net/ethernet/adi/Kconfig              |   28 +
 drivers/net/ethernet/adi/Makefile             |    6 +
 drivers/net/ethernet/adi/adin1110.c           | 1449 +++++++++++++++++
 drivers/net/phy/adin1100.c                    |    7 +-
 7 files changed, 1572 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/net/adi,adin1110.yaml
 create mode 100644 drivers/net/ethernet/adi/Kconfig
 create mode 100644 drivers/net/ethernet/adi/Makefile
 create mode 100644 drivers/net/ethernet/adi/adin1110.c

-- 
2.25.1

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