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Message-ID: <YuFIvxvB2AxKt9PV@hoboy.vegasvil.org>
Date:   Wed, 27 Jul 2022 07:16:31 -0700
From:   Richard Cochran <richardcochran@...il.com>
To:     Ido Schimmel <idosch@...dia.com>
Cc:     netdev@...r.kernel.org, davem@...emloft.net, kuba@...nel.org,
        pabeni@...hat.com, edumazet@...gle.com, petrm@...dia.com,
        amcohen@...dia.com, danieller@...dia.com, mlxsw@...dia.com
Subject: Re: [PATCH net-next 0/9] mlxsw: Add PTP support for Spectrum-2 and
 newer ASICs

On Wed, Jul 27, 2022 at 09:23:19AM +0300, Ido Schimmel wrote:

> Specifically, the hardware will subtract the current time stamp from the
> correction field at the ingress port and will add the current time stamp
> to the correction field at the egress port.

Doing this in pure HW TC mode, the time scale of the switch's clock
does not matter at all.  It can be a free running counter.

> For the purpose of an
> ordinary or boundary clock (this patchset), the correction field will
> always be adjusted between the CPU port and one of the front panel
> ports, but never between two front panel ports.

To clarify, the only reason why you say "never between two front panel
ports" is because the switch will configured not to forward PTP frames
over the front panel ports, for BC mode.  For TC operation, the switch
will apply the correction, right?

Thanks,
Richard

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