netdev - Re: [PATCH net v1 1/1] net: dsa: microchip: don't try do read Gbit registers on non Gbit chips

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Message-ID: <YuKOTzS89D2+O8Ye@lunn.ch>
Date:   Thu, 28 Jul 2022 15:25:35 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Oleksij Rempel <o.rempel@...gutronix.de>
Cc:     Woojung Huh <woojung.huh@...rochip.com>,
        UNGLinuxDriver@...rochip.com,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>, kernel@...gutronix.de,
        linux-kernel@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [PATCH net v1 1/1] net: dsa: microchip: don't try do read Gbit
 registers on non Gbit chips

On Thu, Jul 28, 2022 at 03:17:25PM +0200, Oleksij Rempel wrote:
> Do not try to read not existing or wrong register on chips without
> GBIT_SUPPORT.
> 
> Fixes: c2e866911e25 ("net: dsa: microchip: break KSZ9477 DSA driver into two files")
> Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
> ---
>  drivers/net/dsa/microchip/ksz9477.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c
> index c73bb6d383ad..f6bbd9646c85 100644
> --- a/drivers/net/dsa/microchip/ksz9477.c
> +++ b/drivers/net/dsa/microchip/ksz9477.c
> @@ -316,7 +316,13 @@ void ksz9477_r_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 *data)
>  			break;
>  		}
>  	} else {
> -		ksz_pread16(dev, addr, 0x100 + (reg << 1), &val);
> +		/* No gigabit support.  Do not read wrong registers. */
> +		if (!(dev->features & GBIT_SUPPORT) &&
> +		    (reg == MII_CTRL1000 || reg == MII_ESTATUS ||
> +		     reg == MII_STAT1000))

Does this actually happen?

If i remember this code correctly, it tries to make the oddly looking
PHY look like a normal PHY. phylib is then used to drive the PHY?

If i have that correct, why is phylib trying to read these registers?
It should know there is no 1G support, and should skip them.

   Andrew