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Message-ID: <YuKQU1tqn9jWwtTb@lunn.ch> Date: Thu, 28 Jul 2022 15:34:11 +0200 From: Andrew Lunn <andrew@...n.ch> To: Oleksij Rempel <o.rempel@...gutronix.de> Cc: Woojung Huh <woojung.huh@...rochip.com>, UNGLinuxDriver@...rochip.com, Vivien Didelot <vivien.didelot@...il.com>, Florian Fainelli <f.fainelli@...il.com>, Vladimir Oltean <olteanv@...il.com>, "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, kernel@...gutronix.de, linux-kernel@...r.kernel.org, netdev@...r.kernel.org Subject: Re: [PATCH net v1 1/1] net: dsa: microchip: KSZ9893: do not write to not supported Output Clock Control Register On Thu, Jul 28, 2022 at 03:18:52PM +0200, Oleksij Rempel wrote: > KSZ9893 compatible chips do not have "Output Clock Control Register 0x0103". > So, avoid writing to it. > > Fixes: 462d525018f0 ("net: dsa: microchip: move ksz_chip_data to ksz_common") > Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de> > --- > drivers/net/dsa/microchip/ksz9477.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c > index 5dff6c3279bb..c73bb6d383ad 100644 > --- a/drivers/net/dsa/microchip/ksz9477.c > +++ b/drivers/net/dsa/microchip/ksz9477.c > @@ -198,6 +198,10 @@ int ksz9477_reset_switch(struct ksz_device *dev) > ksz_write32(dev, REG_SW_PORT_INT_MASK__4, 0x7F); > ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &data32); > > + /* KSZ9893 compatible chips do not support refclk configuration */ > + if (dev->chip_id == KSZ9893_CHIP_ID) > + return 0; > + Do you actually want to return -EINVAL? I assume this is being driven by a DT property? And that property is not valid for this chip. So we want to let the DT writer know. Question is, is there a backwards compatibility issue? If this has always been silently ignored, and there are DT with this property, do we want to break them. Andrew
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