lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <980c9926-9199-9b6e-aa65-6b5276af5d70@arinc9.com>
Date:   Sat, 30 Jul 2022 12:15:17 +0300
From:   Arınç ÜNAL <arinc.unal@...nc9.com>
To:     Daniel Golle <daniel@...rotopia.org>
Cc:     Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Sean Wang <sean.wang@...iatek.com>,
        Landen Chao <Landen.Chao@...iatek.com>,
        DENG Qingfang <dqfext@...il.com>,
        Frank Wunderlich <frank-w@...lic-files.de>,
        Luiz Angelo Daros de Luca <luizluca@...il.com>,
        Sander Vanheule <sander@...nheule.net>,
        René van Dorst <opensource@...rst.com>,
        erkin.bozoglu@...ont.com,
        Sergio Paracuellos <sergio.paracuellos@...il.com>,
        netdev@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [RFC PATCH net-next] dt-bindings: net: dsa: mediatek,mt7530:
 completely rework binding

On 28.07.2022 19:14, Daniel Golle wrote:
> Hi,
> 
> please see a minor comment inline below:
> 
> On Tue, Jul 26, 2022 at 03:24:06PM +0300, Arınç ÜNAL wrote:
>> [...]
>> -  CPU-Ports need a phy-mode property:
>> -    Allowed values on mt7530 and mt7621:
>> -      - "rgmii"
>> -      - "trgmii"
>> -    On mt7531:
>> -      - "1000base-x"
>> -      - "2500base-x"
>> -      - "rgmii"
>> -      - "sgmii"
>> +  There are two versions of MT7530. MT7621AT, MT7621DAT, MT7621ST and MT7623AI
> 
> There are two version of MT7530 **supported by this driver**.....
> (MT7620 also contains MT7530, switch registers are directly mapped into
> SoC's memory map rather than using MDIO like on MT7621 and standalone
> variants, and it got FastEthernet PHYs for Port 0-4)

Thanks Daniel. To be precise, this is the case for MT7620AN, MT7620DA, 
MT7620DAN, MT7620NN, MT7628AN, MT7628DAN, MT7628DBN, MT7628KN, MT7628NN, 
MT7688AN and MT7688KN SoCs as all include a 5p FE switch according to 
Russia hosted WikiDevi.

I'll update the description accordingly.

Arınç

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ