netdev - RE: [net PATCH v2] octeontx2-pf: Fix NIX_AF_TL3_TL2X_LINKX

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Message-ID: <DM6PR18MB321255ED74C5684CB2B37748A29A9@DM6PR18MB3212.namprd18.prod.outlook.com>
Date:   Mon, 1 Aug 2022 14:15:35 +0000
From:   Naveen Mamindlapalli <naveenm@...vell.com>
To:     Naveen Mamindlapalli <naveenm@...vell.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Sunil Kovvuri Goutham <sgoutham@...vell.com>
Subject: RE: [net PATCH v2] octeontx2-pf: Fix NIX_AF_TL3_TL2X_LINKX_CFG
 register configuration

Hi All,

Please ignore this patch. Sent by mistake. I will send v3.

Thanks,
Naveen

> -----Original Message-----
> From: Naveen Mamindlapalli <naveenm@...vell.com>
> Sent: Monday, August 1, 2022 6:09 PM
> To: davem@...emloft.net; edumazet@...gle.com; kuba@...nel.org;
> pabeni@...hat.com; netdev@...r.kernel.org; linux-kernel@...r.kernel.org;
> Sunil Kovvuri Goutham <sgoutham@...vell.com>
> Cc: Naveen Mamindlapalli <naveenm@...vell.com>
> Subject: [net PATCH v2] octeontx2-pf: Fix NIX_AF_TL3_TL2X_LINKX_CFG register
> configuration
> 
> For packets scheduled to RPM and LBK,
> NIX_AF_PSE_CHANNEL_LEVEL[BP_LEVEL]
> selects the TL3 or TL2 scheduling level as the one used for link/channel selection
> and backpressure. For each scheduling queue at the selected
> level: Setting NIX_AF_TL3_TL2(0..255)_LINK(0..12)_CFG[ENA] = 1 allows the
> TL3/TL2 queue to schedule packets to a specified RPM or LBK link and channel.
> 
> There is an issue in the code where NIX_AF_PSE_CHANNEL_LEVEL[BP_LEVEL]
> is set to TL3 where as the NIX_AF_TL3_TL2(0..255)_LINK(0..12)_CFG is
> configured for TL2 queue in some cases. As a result packets will not transmit on
> that link/channel. This patch fixes the issue by configuring the
> NIX_AF_TL3_TL2(0..255)_LINK(0..12)_CFG register depending on the
> NIX_AF_PSE_CHANNEL_LEVEL[BP_LEVEL] value.
> 
> Fixes: 5d9b976d4480 ("octeontx2-af: Support fixed transmit scheduler
> topology")
> Signed-off-by: Naveen Mamindlapalli <naveenm@...vell.com>
> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@...vell.com>
> ---
> v2:
>   - Added more details about the fix in commit message.
>   - Added fixes Tag.
> 
> ---
>  .../net/ethernet/marvell/octeontx2/nic/otx2_common.c  | 19
> ++++++++++++++-----  .../net/ethernet/marvell/octeontx2/nic/otx2_common.h
> |  1 +
>  2 files changed, 15 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> index fb8db5888d2f..d686c7b6252f 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> @@ -632,6 +632,12 @@ int otx2_txschq_config(struct otx2_nic *pfvf, int lvl)
>  		req->num_regs++;
>  		req->reg[1] = NIX_AF_TL3X_SCHEDULE(schq);
>  		req->regval[1] = dwrr_val;
> +		if (lvl == hw->txschq_link_cfg_lvl) {
> +			req->num_regs++;
> +			req->reg[2] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, hw-
> >tx_link);
> +			/* Enable this queue and backpressure */
> +			req->regval[2] = BIT_ULL(13) | BIT_ULL(12);
> +		}
>  	} else if (lvl == NIX_TXSCH_LVL_TL2) {
>  		parent =  hw->txschq_list[NIX_TXSCH_LVL_TL1][0];
>  		req->reg[0] = NIX_AF_TL2X_PARENT(schq); @@ -641,11
> +647,12 @@ int otx2_txschq_config(struct otx2_nic *pfvf, int lvl)
>  		req->reg[1] = NIX_AF_TL2X_SCHEDULE(schq);
>  		req->regval[1] = TXSCH_TL1_DFLT_RR_PRIO << 24 | dwrr_val;
> 
> -		req->num_regs++;
> -		req->reg[2] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, hw->tx_link);
> -		/* Enable this queue and backpressure */
> -		req->regval[2] = BIT_ULL(13) | BIT_ULL(12);
> -
> +		if (lvl == hw->txschq_link_cfg_lvl) {
> +			req->num_regs++;
> +			req->reg[2] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, hw-
> >tx_link);
> +			/* Enable this queue and backpressure */
> +			req->regval[2] = BIT_ULL(13) | BIT_ULL(12);
> +		}
>  	} else if (lvl == NIX_TXSCH_LVL_TL1) {
>  		/* Default config for TL1.
>  		 * For VF this is always ignored.
> @@ -1591,6 +1598,8 @@ void mbox_handler_nix_txsch_alloc(struct otx2_nic
> *pf,
>  		for (schq = 0; schq < rsp->schq[lvl]; schq++)
>  			pf->hw.txschq_list[lvl][schq] =
>  				rsp->schq_list[lvl][schq];
> +
> +	pf->hw.txschq_link_cfg_lvl = rsp->link_cfg_lvl;
>  }
>  EXPORT_SYMBOL(mbox_handler_nix_txsch_alloc);
> 
> diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> index ce2766317c0b..f9c0d2f08e87 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> @@ -195,6 +195,7 @@ struct otx2_hw {
>  	u16			sqb_size;
> 
>  	/* NIX */
> +	u8			txschq_link_cfg_lvl;
>  	u16
> 	txschq_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];
>  	u16			matchall_ipolicer;
>  	u32			dwrr_mtu;
> --
> 2.16.5