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Date:   Tue, 2 Aug 2022 09:49:03 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Matej Vasilevski <matej.vasilevski@...nam.cz>,
        Pavel Pisa <pisa@....felk.cvut.cz>,
        Ondrej Ille <ondrej.ille@...il.com>,
        Wolfgang Grandegger <wg@...ndegger.com>,
        Marc Kleine-Budde <mkl@...gutronix.de>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     linux-can@...r.kernel.org, netdev@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v2 2/3] dt-bindings: can: ctucanfd: add another clock for
 HW timestamping

On 01/08/2022 20:46, Matej Vasilevski wrote:
> Add second clock phandle to specify the timestamping clock.
> You can even use the same clock as the core, or define a fixed-clock
> if you need something custom.
> 
> Signed-off-by: Matej Vasilevski <matej.vasilevski@...nam.cz>
> ---
>  .../bindings/net/can/ctu,ctucanfd.yaml        | 23 +++++++++++++++----
>  1 file changed, 19 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
> index 4635cb96fc64..90390530f909 100644
> --- a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
> +++ b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
> @@ -44,9 +44,23 @@ properties:
>  
>    clocks:
>      description: |
> -      phandle of reference clock (100 MHz is appropriate
> -      for FPGA implementation on Zynq-7000 system).
> -    maxItems: 1
> +      Phandle of reference clock (100 MHz is appropriate for FPGA
> +      implementation on Zynq-7000 system). If you wish to use timestamps
> +      from the controller, add a second phandle with the clock used for
> +      timestamping. The timestamping clock is optional, if you don't
> +      add it here, the driver will use the primary clock frequency for
> +      timestamp calculations. If you need something custom, define
> +      a fixed-clock oscillator and reference it.

This should not be a guide how to write DTS, but description of
hardware. The references to driver are also not really appropriate in
the bindings (are you 100% sure that all other operating systems and SW
have driver which behaves like this...)

> +    minItems: 1
> +    items:
> +      - description: core clock
> +      - description: timestamping clock
> +
> +  clock-names:
> +    minItems: 1
> +    items:
> +      - const: core-clk
> +      - const: ts-clk
>  
>  required:
>    - compatible
> @@ -61,6 +75,7 @@ examples:
>      ctu_can_fd_0: can@...30000 {
>        compatible = "ctu,ctucanfd";
>        interrupts = <0 30 4>;
> -      clocks = <&clkc 15>;
> +      clocks = <&clkc 15>, <&clkc 16>;
> +      clock-names = "core-clk", "ts-clk";
>        reg = <0x43c30000 0x10000>;
>      };


Best regards,
Krzysztof

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