netdev - Re: [PATCH net] net: dsa: microchip: keep compatibility with device tree blobs with no phy-mode

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 18 Aug 2022 15:06:44 +0000
From:   Alvin Šipraga <ALSI@...g-olufsen.dk>
To:     Vladimir Oltean <vladimir.oltean@....com>
CC:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        Woojung Huh <woojung.huh@...rochip.com>,
        "UNGLinuxDriver@...rochip.com" <UNGLinuxDriver@...rochip.com>,
        Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Russell King <linux@...linux.org.uk>,
        Michael Grzeschik <m.grzeschik@...gutronix.de>,
        Oleksij Rempel <linux@...pel-privat.de>,
        Thorsten Leemhuis <regressions@...mhuis.info>,
        Rasmus Villemoes <linux@...musvillemoes.dk>,
        Craig McQueen <craig@...ueen.id.au>
Subject: Re: [PATCH net] net: dsa: microchip: keep compatibility with device
 tree blobs with no phy-mode

On Thu, Aug 18, 2022 at 05:32:50PM +0300, Vladimir Oltean wrote:
> DSA has multiple ways of specifying a MAC connection to an internal PHY.
> One requires a DT description like this:
> 
> 	port@0 {
> 		reg = <0>;
> 		phy-handle = <&internal_phy>;
> 		phy-mode = "internal";
> 	};
> 
> (which is IMO the recommended approach, as it is the clearest
> description)
> 
> but it is also possible to leave the specification as just:
> 
> 	port@0 {
> 		reg = <0>;
> 	}
> 
> and if the driver implements ds->ops->phy_read and ds->ops->phy_write,
> the DSA framework "knows" it should create a ds->slave_mii_bus, and it
> should connect to a non-OF-based internal PHY on this MDIO bus, at an
> MDIO address equal to the port address.
> 
> There is also an intermediary way of describing things:
> 
> 	port@0 {
> 		reg = <0>;
> 		phy-handle = <&internal_phy>;
> 	};
> 
> In case 2, DSA calls phylink_connect_phy() and in case 3, it calls
> phylink_of_phy_connect(). In both cases, phylink_create() has been
> called with a phy_interface_t of PHY_INTERFACE_MODE_NA, and in both
> cases, PHY_INTERFACE_MODE_NA is translated into phy->interface.
> 
> It is important to note that phy_device_create() initializes
> dev->interface = PHY_INTERFACE_MODE_GMII, and so, when we use
> phylink_create(PHY_INTERFACE_MODE_NA), no one will override this, and we
> will end up with a PHY_INTERFACE_MODE_GMII interface inherited from the
> PHY.
> 
> All this means that in order to maintain compatibility with device tree
> blobs where the phy-mode property is missing, we need to allow the
> "gmii" phy-mode and treat it as "internal".
> 
> Fixes: 2c709e0bdad4 ("net: dsa: microchip: ksz8795: add phylink support")
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=216320
> Reported-by: Craig McQueen <craig@...ueen.id.au>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
> ---
>  drivers/net/dsa/microchip/ksz_common.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)

Reviewed-by: Alvin Šipraga <alsi@...g-olufsen.dk>

Some quick grepping shows at least a few other drivers which do not set
PHY_INTERFACE_MODE_GMII for their ports with internal PHY:

    bcm_sf2
    ar9331 (*)
    lantiq_gswip

Should these be "fixed" too? Or only if somebody reports a regression?

(*) I note that ar9331 ought not to rely on DSA workarounds, per your
other patchset, so I there is actually no need to "fix" that one, since
the new validation you are introducing will require a phy-mode to be
specified for those switches' ports anyway.

> 
> diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
> index ed7d137cba99..7461272a6d41 100644
> --- a/drivers/net/dsa/microchip/ksz_common.c
> +++ b/drivers/net/dsa/microchip/ksz_common.c
> @@ -803,9 +803,15 @@ static void ksz_phylink_get_caps(struct dsa_switch *ds, int port,
>  	if (dev->info->supports_rgmii[port])
>  		phy_interface_set_rgmii(config->supported_interfaces);
>  
> -	if (dev->info->internal_phy[port])
> +	if (dev->info->internal_phy[port]) {
>  		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
>  			  config->supported_interfaces);
> +		/* Compatibility for phylib's default interface type when the
> +		 * phy-mode property is absent
> +		 */
> +		__set_bit(PHY_INTERFACE_MODE_GMII,
> +			  config->supported_interfaces);
> +	}
>  
>  	if (dev->dev_ops->get_caps)
>  		dev->dev_ops->get_caps(dev, port, config);
> -- 
> 2.34.1
>