[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220818222742.1070935-7-jacob.e.keller@intel.com>
Date: Thu, 18 Aug 2022 15:27:34 -0700
From: Jacob Keller <jacob.e.keller@...el.com>
To: netdev@...r.kernel.org
Cc: Jacob Keller <jacob.e.keller@...el.com>,
"K. Y. Srinivasan" <kys@...rosoft.com>,
Haiyang Zhang <haiyangz@...rosoft.com>,
Stephen Hemminger <sthemmin@...rosoft.com>,
Wei Liu <wei.liu@...nel.org>, Dexuan Cui <decui@...rosoft.com>,
Tom Lendacky <thomas.lendacky@....com>,
Shyam Sundar S K <Shyam-sundar.S-k@....com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Siva Reddy Kallam <siva.kallam@...adcom.com>,
Prashant Sreedharan <prashant@...adcom.com>,
Michael Chan <mchan@...adcom.com>,
Yisen Zhuang <yisen.zhuang@...wei.com>,
Salil Mehta <salil.mehta@...wei.com>,
Jesse Brandeburg <jesse.brandeburg@...el.com>,
Tony Nguyen <anthony.l.nguyen@...el.com>,
Tariq Toukan <tariqt@...dia.com>,
Saeed Mahameed <saeedm@...dia.com>,
Leon Romanovsky <leon@...nel.org>,
Bryan Whitehead <bryan.whitehead@...rochip.com>,
Sergey Shtylyov <s.shtylyov@....ru>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Richard Cochran <richardcochran@...il.com>,
Vivek Thampi <vithampi@...are.com>,
VMware PV-Drivers Reviewers <pv-drivers@...are.com>,
Jie Wang <wangjie125@...wei.com>,
Guangbin Huang <huangguangbin2@...wei.com>,
Eran Ben Elisha <eranbe@...dia.com>,
Aya Levin <ayal@...dia.com>,
Cai Huoqing <cai.huoqing@...ux.dev>,
Biju Das <biju.das.jz@...renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Phil Edworthy <phil.edworthy@...esas.com>,
Jiasheng Jiang <jiasheng@...as.ac.cn>,
"Gustavo A. R. Silva" <gustavoars@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Wan Jiabing <wanjiabing@...o.com>,
Lv Ruyi <lv.ruyi@....com.cn>, Arnd Bergmann <arnd@...db.de>
Subject: [net-next 06/14] ptp: tg3: convert to .adjfine and diff_by_scaled_ppm
The tg3 implementation of .adjfreq is implemented in terms of a
straight forward "base * ppb / 1 billion" calculation.
Convert this driver to the .adjfine implementation, and use
diff_by_scaled_ppm to calculate the correction value.
Signed-off-by: Jacob Keller <jacob.e.keller@...el.com>
Cc: Siva Reddy Kallam <siva.kallam@...adcom.com>
Cc: Prashant Sreedharan <prashant@...adcom.com>
Cc: Michael Chan <mchan@...adcom.com>
---
I do not have this hardware, and have only compile tested this change.
drivers/net/ethernet/broadcom/tg3.c | 22 +++++++++-------------
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index db1e9d810b41..c5dcbd83ae66 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -6179,27 +6179,23 @@ static int tg3_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info)
return 0;
}
-static int tg3_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
+static int tg3_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
{
struct tg3 *tp = container_of(ptp, struct tg3, ptp_info);
- bool neg_adj = false;
- u32 correction = 0;
-
- if (ppb < 0) {
- neg_adj = true;
- ppb = -ppb;
- }
+ u32 correction;
+ bool neg_adj;
+ u64 diff;
/* Frequency adjustment is performed using hardware with a 24 bit
* accumulator and a programmable correction value. On each clk, the
* correction value gets added to the accumulator and when it
* overflows, the time counter is incremented/decremented.
*
- * So conversion from ppb to correction value is
- * ppb * (1 << 24) / 1000000000
+ * So conversion from scaled_ppm to correction value is
+ * (1 << 24) * scaled_ppm / (1000000 << 16)
*/
- correction = div_u64((u64)ppb * (1 << 24), 1000000000ULL) &
- TG3_EAV_REF_CLK_CORRECT_MASK;
+ neg_adj = diff_by_scaled_ppm(1 << 24, scaled_ppm, &diff);
+ correction = diff & TG3_EAV_REF_CLK_CORRECT_MASK;
tg3_full_lock(tp, 0);
@@ -6330,7 +6326,7 @@ static const struct ptp_clock_info tg3_ptp_caps = {
.n_per_out = 1,
.n_pins = 0,
.pps = 0,
- .adjfreq = tg3_ptp_adjfreq,
+ .adjfine = tg3_ptp_adjfine,
.adjtime = tg3_ptp_adjtime,
.gettimex64 = tg3_ptp_gettimex,
.settime64 = tg3_ptp_settime,
--
2.37.1.208.ge72d93e88cb2
Powered by blists - more mailing lists