lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-ID: <f0f6e8af-4006-e0e8-544b-f2f892d79a1f@linaro.org> Date: Fri, 19 Aug 2022 12:14:01 +0300 From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> To: wei.fang@....com, davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com, robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org, andrew@...n.ch, f.fainelli@...il.com, hkallweit1@...il.com, linux@...linux.org.uk Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH net-next 1/2] dt-bindings: net: tja11xx: add nxp,refclk_in property On 19/08/2022 10:47, wei.fang@....com wrote: > From: Wei Fang <wei.fang@....com> > > TJA110x REF_CLK can be configured as interface reference clock > intput or output when the RMII mode enabled. This patch add the > property to make the REF_CLK can be configurable. > > Signed-off-by: Wei Fang <wei.fang@....com> > --- > .../devicetree/bindings/net/nxp,tja11xx.yaml | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml > index d51da24f3505..c51ee52033e8 100644 > --- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml > +++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml > @@ -31,6 +31,22 @@ patternProperties: > description: > The ID number for the child PHY. Should be +1 of parent PHY. > > + nxp,rmii_refclk_in: No underscores in properties. > + type: boolean > + description: | > + The REF_CLK is provided for both transmitted and receivced data typo: received > + in RMII mode. This clock signal is provided by the PHY and is > + typically derived from an external 25MHz crystal. Alternatively, > + a 50MHz clock signal generated by an external oscillator can be > + connected to pin REF_CLK. A third option is to connect a 25MHz > + clock to pin CLK_IN_OUT. So, the REF_CLK should be configured > + as input or output according to the actual circuit connection. > + If present, indicates that the REF_CLK will be configured as > + interface reference clock input when RMII mode enabled. > + If not present, the REF_CLK will be configured as interface > + reference clock output when RMII mode enabled. > + Only supported on TJA1100 and TJA1101. Then disallow it on other variants. Shouldn't this be just "clocks" property? Best regards, Krzysztof
Powered by blists - more mailing lists