netdev - Re: [PATCH net] net: dsa: microchip: keep compatibility with device tree blobs with no phy-mode

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Message-ID: <095c6c01-d4dd-8275-19fc-f9fe1ea40ab8@rasmusvillemoes.dk>
Date:   Fri, 19 Aug 2022 12:19:12 +0200
From:   Rasmus Villemoes <linux@...musvillemoes.dk>
To:     Vladimir Oltean <vladimir.oltean@....com>, netdev@...r.kernel.org
Cc:     Woojung Huh <woojung.huh@...rochip.com>,
        UNGLinuxDriver@...rochip.com, Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Russell King <linux@...linux.org.uk>,
        Michael Grzeschik <m.grzeschik@...gutronix.de>,
        Oleksij Rempel <linux@...pel-privat.de>,
        Thorsten Leemhuis <regressions@...mhuis.info>,
        Alvin Šipraga <alsi@...g-olufsen.dk>,
        Craig McQueen <craig@...ueen.id.au>
Subject: Re: [PATCH net] net: dsa: microchip: keep compatibility with device
 tree blobs with no phy-mode

On 18/08/2022 16.32, Vladimir Oltean wrote:
> DSA has multiple ways of specifying a MAC connection to an internal PHY.
> One requires a DT description like this:
> 
> 	port@0 {
> 		reg = <0>;
> 		phy-handle = <&internal_phy>;
> 		phy-mode = "internal";
> 	};
> 
> (which is IMO the recommended approach, as it is the clearest
> description)
> 
> but it is also possible to leave the specification as just:
> 
> 	port@0 {
> 		reg = <0>;
> 	}
> 
> and if the driver implements ds->ops->phy_read and ds->ops->phy_write,
> the DSA framework "knows" it should create a ds->slave_mii_bus, and it
> should connect to a non-OF-based internal PHY on this MDIO bus, at an
> MDIO address equal to the port address.
> 
> There is also an intermediary way of describing things:
> 
> 	port@0 {
> 		reg = <0>;
> 		phy-handle = <&internal_phy>;
> 	};

Well, there's also e.g. arch/arm/boot/dts/at91-sama5d3_ksz9477_evb.dts
which sets the phy-mode but not the phy-handle:

                        port@0 {
                                reg = <0>;
                                label = "lan1";
                                phy-mode = "internal";
                        };

And doing that in my case seems to fix things (I wouldn't know what
phy-handle to point at anyway), so since we're still in development, I
think I'll do that. But if I want to follow the new-world-order to the
letter, should I also figure out a way to point at a phy-handle?
> Fixes: 2c709e0bdad4 ("net: dsa: microchip: ksz8795: add phylink support")
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=216320
> Reported-by: Craig McQueen <craig@...ueen.id.au>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>

I've also tested this patch on top of v5.19 without altering my .dts,
and that also seems to fix things, so I suppose you can add

Fixes: 65ac79e18120 ("net: dsa: microchip: add the phylink get_caps")
Tested-by: Rasmus Villemoes <rasmus.villemoes@...vas.dk>

Thanks,
Rasmus