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Message-ID: <0c7fdf31-3c81-2253-ef45-106ca099cac7@omp.ru>
Date:   Sat, 20 Aug 2022 22:33:44 +0300
From:   Sergey Shtylyov <s.shtylyov@....ru>
To:     Jacob Keller <jacob.e.keller@...el.com>, <netdev@...r.kernel.org>
CC:     "K. Y. Srinivasan" <kys@...rosoft.com>,
        Haiyang Zhang <haiyangz@...rosoft.com>,
        Stephen Hemminger <sthemmin@...rosoft.com>,
        Wei Liu <wei.liu@...nel.org>, Dexuan Cui <decui@...rosoft.com>,
        Tom Lendacky <thomas.lendacky@....com>,
        Shyam Sundar S K <Shyam-sundar.S-k@....com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Siva Reddy Kallam <siva.kallam@...adcom.com>,
        Prashant Sreedharan <prashant@...adcom.com>,
        Michael Chan <mchan@...adcom.com>,
        Yisen Zhuang <yisen.zhuang@...wei.com>,
        Salil Mehta <salil.mehta@...wei.com>,
        Jesse Brandeburg <jesse.brandeburg@...el.com>,
        Tony Nguyen <anthony.l.nguyen@...el.com>,
        Tariq Toukan <tariqt@...dia.com>,
        Saeed Mahameed <saeedm@...dia.com>,
        Leon Romanovsky <leon@...nel.org>,
        Bryan Whitehead <bryan.whitehead@...rochip.com>,
        Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Jose Abreu <joabreu@...opsys.com>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Richard Cochran <richardcochran@...il.com>,
        Vivek Thampi <vithampi@...are.com>,
        VMware PV-Drivers Reviewers <pv-drivers@...are.com>,
        Jie Wang <wangjie125@...wei.com>,
        Guangbin Huang <huangguangbin2@...wei.com>,
        Eran Ben Elisha <eranbe@...dia.com>,
        Aya Levin <ayal@...dia.com>,
        Cai Huoqing <cai.huoqing@...ux.dev>,
        Biju Das <biju.das.jz@...renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        Phil Edworthy <phil.edworthy@...esas.com>,
        Jiasheng Jiang <jiasheng@...as.ac.cn>,
        "Gustavo A. R. Silva" <gustavoars@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Wan Jiabing <wanjiabing@...o.com>,
        Lv Ruyi <lv.ruyi@....com.cn>, Arnd Bergmann <arnd@...db.de>,
        <linux-renesas-soc@...r.kernel.org>
Subject: Re: [net-next 11/14] ptp: ravb: convert to .adjfine and
 adjust_by_scaled_ppm

Hello!

On 8/19/22 1:27 AM, Jacob Keller wrote:

> The ravb implementation of .adjfreq is implemented in terms of a
> straight forward "base * ppb / 1 billion" calculation.
> 
> Convert this driver to .adjfine and use the adjust_by_scaled_ppm helper
> function to calculate the new addend.
> 
> Signed-off-by: Jacob Keller <jacob.e.keller@...el.com>
> Cc: Sergey Shtylyov <s.shtylyov@....ru>
> Cc: Biju Das <biju.das.jz@...renesas.com>
> Cc: Phil Edworthy <phil.edworthy@...esas.com>
> Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Cc: linux-renesas-soc@...r.kernel.org
> ---
> 
> I do not have this hardware, and have only compile tested the change.
> 
>  drivers/net/ethernet/renesas/ravb_ptp.c | 16 +++++-----------
>  1 file changed, 5 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/net/ethernet/renesas/ravb_ptp.c b/drivers/net/ethernet/renesas/ravb_ptp.c
> index 87c4306d66ec..941aa3b0e8a0 100644
> --- a/drivers/net/ethernet/renesas/ravb_ptp.c
> +++ b/drivers/net/ethernet/renesas/ravb_ptp.c
> @@ -88,24 +88,18 @@ static int ravb_ptp_update_compare(struct ravb_private *priv, u32 ns)
>  }
>  
>  /* PTP clock operations */
> -static int ravb_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
> +static int ravb_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
>  {
>  	struct ravb_private *priv = container_of(ptp, struct ravb_private,
>  						 ptp.info);
>  	struct net_device *ndev = priv->ndev;
>  	unsigned long flags;
> -	u32 diff, addend;
> -	bool neg_adj = false;
> +	u32 addend;
>  	u32 gccr;
>  
> -	if (ppb < 0) {
> -		neg_adj = true;
> -		ppb = -ppb;
> -	}
>  	addend = priv->ptp.default_addend;

   I don't think we should keep this line -- it has no effect now...

> -	diff = div_u64((u64)addend * ppb, NSEC_PER_SEC);
> -
> -	addend = neg_adj ? addend - diff : addend + diff;
> +	addend = (u32)adjust_by_scaled_ppm(priv->ptp.default_addend,
> +					   scaled_ppm);
>  
>  	spin_lock_irqsave(&priv->lock, flags);
>  
[...]

MBR, Sergey

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