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Message-Id: <20220823080231.2466017-12-o.rempel@pengutronix.de>
Date:   Tue, 23 Aug 2022 10:02:25 +0200
From:   Oleksij Rempel <o.rempel@...gutronix.de>
To:     Woojung Huh <woojung.huh@...rochip.com>,
        UNGLinuxDriver@...rochip.com, Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>
Cc:     Oleksij Rempel <o.rempel@...gutronix.de>, kernel@...gutronix.de,
        linux-kernel@...r.kernel.org, netdev@...r.kernel.org
Subject: [PATCH net-next v3 11/17] net: dsa: microchip: ksz9477: remove MII_CTRL1000 check from ksz9477_w_phy()

The reason why PHYlib may access MII_CTRL1000 on the chip without GBit
support is only if chip provides wrong information about extended caps
register. This issue is now handled by ksz9477_r_phy_quirks()

With proper regmap_ranges provided for all chips we will be able to catch this
kind of bugs any way. So, remove this sanity check.

Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
---
 drivers/net/dsa/microchip/ksz9477.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c
index 54514c9e6e003..cb5bd0ceb8df4 100644
--- a/drivers/net/dsa/microchip/ksz9477.c
+++ b/drivers/net/dsa/microchip/ksz9477.c
@@ -342,10 +342,6 @@ int ksz9477_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val)
 	if (addr >= dev->phy_port_cnt)
 		return 0;
 
-	/* No gigabit support.  Do not write to this register. */
-	if (!dev->info->gbit_capable[addr] && reg == MII_CTRL1000)
-		return -ENXIO;
-
 	return ksz_pwrite16(dev, addr, 0x100 + (reg << 1), val);
 }
 
-- 
2.30.2

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