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Message-ID: <OS0PR01MB5922B934EC3D847BBFC6F3BA86739@OS0PR01MB5922.jpnprd01.prod.outlook.com>
Date: Wed, 24 Aug 2022 09:12:36 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
CC: Wolfgang Grandegger <wg@...ndegger.com>,
Marc Kleine-Budde <mkl@...gutronix.de>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
"linux-can@...r.kernel.org" <linux-can@...r.kernel.org>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Chris Paterson <Chris.Paterson2@...esas.com>,
Biju Das <biju.das@...renesas.com>,
"linux-renesas-soc@...r.kernel.org"
<linux-renesas-soc@...r.kernel.org>
Subject: RE: [PATCH v4 2/6] dt-bindings: can: nxp,sja1000: Document RZ/N1{D,S}
support
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH v4 2/6] dt-bindings: can: nxp,sja1000: Document
> RZ/N1{D,S} support
>
> Hi Biju,
>
> On Sun, Jul 10, 2022 at 1:53 PM Biju Das <biju.das.jz@...renesas.com>
> wrote:
> > Add CAN binding documentation for Renesas RZ/N1 SoC.
> >
> > The SJA1000 CAN controller on RZ/N1 SoC has some differences compared
> > to others like it has no clock divider register (CDR) support and it
> > has no HW loopback (HW doesn't see tx messages on rx), so introduced a
> > new compatible 'renesas,rzn1-sja1000' to handle these differences.
> >
> > Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
>
> Thanks for your patch, which is now commit 4591c760b7975984
> ("dt-bindings: can: nxp,sja1000: Document RZ/N1{D,S} in v6.0-rc1.
>
> > --- a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml
> > +++ b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml
> > @@ -11,9 +11,15 @@ maintainers:
> >
> > properties:
> > compatible:
> > - enum:
> > - - nxp,sja1000
> > - - technologic,sja1000
> > + oneOf:
> > + - enum:
> > + - nxp,sja1000
> > + - technologic,sja1000
> > + - items:
> > + - enum:
> > + - renesas,r9a06g032-sja1000 # RZ/N1D
> > + - renesas,r9a06g033-sja1000 # RZ/N1S
> > + - const: renesas,rzn1-sja1000 # RZ/N1
> >
> > reg:
> > maxItems: 1
> > @@ -21,6 +27,9 @@ properties:
> > interrupts:
> > maxItems: 1
> >
> > + clocks:
> > + maxItems: 1
> > +
>
> Probably you want to add the power-domains property, and make it
> required on RZ/N1.
> This is not super-critical, as your driver patch uses explicit clock
> handling anyway.
OK, will add this and Send SoC/Board dtsi patches.
Cheers,
Biju.
>
> > reg-io-width:
> > $ref: /schemas/types.yaml#/definitions/uint32
> > description: I/O register width (in bytes) implemented by this
> > device
>
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker.
> But when I'm talking to journalists I just say "programmer" or something
> like that.
> -- Linus Torvalds
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