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Message-ID: <YwfvaSFejdtPtZgK@lunn.ch>
Date: Thu, 25 Aug 2022 23:53:45 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Divya Koppera <Divya.Koppera@...rochip.com>
Cc: hkallweit1@...il.com, linux@...linux.org.uk, davem@...emloft.net,
edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH net-next] net: phy: micrel: Adding SQI support for
lan8814 phy
> +#define LAN8814_DCQ_CTRL 0xe6
> +#define LAN8814_DCQ_CTRL_READ_CAPTURE_ BIT(15)
> +#define LAN8814_DCQ_CTRL_CHANNEL_MASK GENMASK(1, 0)
> +#define LAN8814_DCQ_SQI 0xe4
> +#define LAN8814_DCQ_SQI_MAX 7
> +#define LAN8814_DCQ_SQI_VAL_MASK GENMASK(3, 1)
> +
> static int lanphy_read_page_reg(struct phy_device *phydev, int page, u32 addr)
> {
> int data;
> @@ -2927,6 +2934,32 @@ static int lan8814_probe(struct phy_device *phydev)
> return 0;
> }
>
> +static int lan8814_get_sqi(struct phy_device *phydev)
> +{
> + int rc, val;
> +
> + val = lanphy_read_page_reg(phydev, 1, LAN8814_DCQ_CTRL);
> + if (val < 0)
> + return val;
I just took a quick look at the datasheet. It says:
All registers references in this section are in MMD Device Address 1
So you should be using phy_read_mmd(phydev, MDIO_MMD_PMAPMD, xxx) to
read/write these registers. The datasheet i have however is missing
the register map, so i've no idea if it is still 0xe6.
Andrew
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