netdev - Re: [RFC PATCH v2 0/3] Create common DPLL/clock configuration API

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Message-ID: <ec9c1279-6871-a6b0-acc8-12a29e707543@nvidia.com>
Date:   Thu, 1 Sep 2022 15:02:36 +0300
From:   Gal Pressman <gal@...dia.com>
To:     Vadim Fedorenko <vfedorenko@...ek.ru>,
        Jakub Kicinski <kuba@...nel.org>,
        Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>,
        Jonathan Lemon <jonathan.lemon@...il.com>
Cc:     Vadim Fedorenko <vadfed@...com>, Aya Levin <ayal@...dia.com>,
        netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-clk@...r.kernel.org, Ariel Almog <ariela@...dia.com>,
        Bar Shapira <bshapira@...dia.com>
Subject: Re: [RFC PATCH v2 0/3] Create common DPLL/clock configuration API

On 26/06/2022 22:24, Vadim Fedorenko wrote:
> From: Vadim Fedorenko <vadfed@...com>
>
> Implement common API for clock/DPLL configuration and status reporting.
> The API utilises netlink interface as transport for commands and event
> notifications. This API aim to extend current pin configuration and
> make it flexible and easy to cover special configurations.

Hello Vadim,
I'm trying to understand how we can register our mlx5 hardware with this
DPLL subsystem, and honestly I don't understand how this is going to be
used eventually.

Is there anywhere else I can read more about this work? Maybe some
documentation explaining the use-cases? Is there userspace code I can
see to get a sense of the full picture?

Thanks