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Message-Id: <0-v1-bd147097458e+ede-umem_dmabuf_jgg@nvidia.com>
Date: Thu, 1 Sep 2022 11:20:52 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Christian König <christian.koenig@....com>,
dri-devel@...ts.freedesktop.org, Leon Romanovsky <leon@...nel.org>,
linaro-mm-sig@...ts.linaro.org, linux-media@...r.kernel.org,
linux-rdma@...r.kernel.org, netdev@...r.kernel.org,
Saeed Mahameed <saeedm@...dia.com>,
Sumit Semwal <sumit.semwal@...aro.org>
Cc: Kamal Heib <kamalheib1@...il.com>,
Mohammad Kabat <mohammadkab@...dia.com>
Subject: [PATCH 0/4] RDMA/mlx5: Support DMABUF in umems and enable ATS
This series adds support for DMABUF when creating a devx umem. devx umems
are quite similar to MR's execpt they cannot be revoked, so this uses the
dmabuf pinned memory flow. Several mlx5dv flows require umem and cannot
work with MR.
The intended use case is primarily for P2P transfers using dmabuf as a
handle to the underlying PCI BAR memory from the exporter. When a PCI
switch is present the P2P transfers can bypass the host bridge completely
and go directly through the switch. ATS allows this bypass to function in
more cases as translated TLPs issued after an ATS query allows the request
redirect setting to be bypassed in the switch.
Have mlx5 automatically use ATS in places where it makes sense.
Jason Gunthorpe (4):
net/mlx5: Add IFC bits for mkey ATS
RDMA/core: Add UVERBS_ATTR_RAW_FD
RDMA/mlx5: Add support for dmabuf to devx umem
RDMA/mlx5: Enable ATS support for MRs and umems
drivers/infiniband/core/uverbs_ioctl.c | 8 ++++
drivers/infiniband/hw/mlx5/devx.c | 55 +++++++++++++++++-------
drivers/infiniband/hw/mlx5/mlx5_ib.h | 36 ++++++++++++++++
drivers/infiniband/hw/mlx5/mr.c | 5 ++-
include/linux/mlx5/mlx5_ifc.h | 11 +++--
include/rdma/uverbs_ioctl.h | 13 ++++++
include/uapi/rdma/mlx5_user_ioctl_cmds.h | 1 +
7 files changed, 109 insertions(+), 20 deletions(-)
base-commit: b90cb1053190353cc30f0fef0ef1f378ccc063c5
--
2.37.2
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