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Date:   Thu, 1 Sep 2022 15:32:13 +0000
From:   David Thompson <davthompson@...dia.com>
To:     Jakub Kicinski <kuba@...nel.org>
CC:     "davem@...emloft.net" <davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "cai.huoqing@...ux.dev" <cai.huoqing@...ux.dev>,
        "brgl@...ev.pl" <brgl@...ev.pl>, Liming Sun <limings@...dia.com>,
        Asmaa Mnebhi <asmaa@...dia.com>
Subject: RE: [PATCH net v1] mlxbf_gige: compute MDIO period based on i1clk

> -----Original Message-----
> From: Jakub Kicinski <kuba@...nel.org>
> Sent: Friday, August 26, 2022 9:49 PM
> To: David Thompson <davthompson@...dia.com>
> Cc: davem@...emloft.net; edumazet@...gle.com; pabeni@...hat.com;
> netdev@...r.kernel.org; cai.huoqing@...ux.dev; brgl@...ev.pl; Liming Sun
> <limings@...dia.com>; Asmaa Mnebhi <asmaa@...dia.com>
> Subject: Re: [PATCH net v1] mlxbf_gige: compute MDIO period based on i1clk
> 
> On Fri, 26 Aug 2022 11:59:16 -0400 David Thompson wrote:
> > This patch adds logic to compute the MDIO period based on the i1clk,
> > and thereafter write the MDIO period into the YU MDIO config register.
> > The i1clk resource from the ACPI table is used to provide addressing
> > to YU bootrecord PLL registers.
> > The values in these registers are used to compute MDIO period.
> > If the i1clk resource is not present in the ACPI table, then the
> > current default hardcorded value of 430Mhz is used.
> > The i1clk clock value of 430MHz is only accurate for boards with BF2
> > mid bin and main bin SoCs. The BF2 high bin SoCs have i1clk = 500MHz,
> > but can support a slower MDIO period.
> >
> > Fixes: f92e1869d74e ("Add Mellanox BlueField Gigabit Ethernet driver")
> > Reviewed-by: Asmaa Mnebhi <asmaa@...dia.com>
> > Signed-off-by: David Thompson <davthompson@...dia.com>
> 
> Hm, why did you repost this?

I reposted because the first post failed the "netdev/cc_maintainers" test:

	netdev/cc_maintainers	fail	1 blamed authors not CCed: limings@...dia.com; 1 maintainers not CCed: limings@...dia.com

In the second post I included "limings@...dia.com" .

- Dave

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