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Message-ID: <Yxe9k86sWSf687zd@lunn.ch>
Date: Tue, 6 Sep 2022 23:37:23 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Stephen Hemminger <stephen@...workplumber.org>
Cc: Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <vladimir.oltean@....com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
David Ahern <dsahern@...nel.org>,
Vivien Didelot <vivien.didelot@...il.com>
Subject: Re: [PATCH iproute2] ip link: add sub-command to view and change DSA
master
On Tue, Sep 06, 2022 at 02:17:19PM -0700, Stephen Hemminger wrote:
> On Tue, 6 Sep 2022 13:33:09 -0700
> Florian Fainelli <f.fainelli@...il.com> wrote:
>
> > On 9/6/2022 1:05 PM, Andrew Lunn wrote:
> > >> [ Alternative answer: how about "schnauzer"? I always liked how that word sounds. ]
> > >
> > > Unfortunately, it is not gender neutral, which i assume is a
> > > requirement?
> > >
> > > Plus the plural is also schnauzer, which would make your current
> > > multiple CPU/schnauzer patches confusing, unless you throw the rule
> > > book out and use English pluralisation.
> >
> > What a nice digression, I had no idea you two mastered German that well
> > :). How about "conduit" or "mgmt_port" or some variant in the same lexicon?
>
> Is there an IEEE or PCI standard for this? What is used there?
The whole DSA concept is comes from Marvell.
commit 91da11f870f00a3322b81c73042291d7f0be5a17
Author: Lennert Buytenhek <buytenh@...tstofly.org>
Date: Tue Oct 7 13:44:02 2008 +0000
net: Distributed Switch Architecture protocol support
Distributed Switch Architecture is a protocol for managing hardware
switch chips. It consists of a set of MII management registers and
commands to configure the switch, and an ethernet header format to
signal which of the ports of the switch a packet was received from
or is intended to be sent to.
The switches that this driver supports are typically embedded in
access points and routers, and a typical setup with a DSA switch
looks something like this:
+-----------+ +-----------+
| | RGMII | |
| +-------+ +------ 1000baseT MDI ("WAN")
| | | 6-port +------ 1000baseT MDI ("LAN1")
| CPU | | ethernet +------ 1000baseT MDI ("LAN2")
| |MIImgmt| switch +------ 1000baseT MDI ("LAN3")
| +-------+ w/5 PHYs +------ 1000baseT MDI ("LAN4")
| | | |
+-----------+ +-----------+
The switch driver presents each port on the switch as a separate
network interface to Linux, polls the switch to maintain software
link state of those ports, forwards MII management interface
accesses to those network interfaces (e.g. as done by ethtool) to
the switch, and exposes the switch's hardware statistics counters
via the appropriate Linux kernel interfaces.
This initial patch supports the MII management interface register
layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and
supports the "Ethertype DSA" packet tagging format.
(There is no officially registered ethertype for the Ethertype DSA
packet format, so we just grab a random one. The ethertype to use
is programmed into the switch, and the switch driver uses the value
of ETH_P_EDSA for this, so this define can be changed at any time in
the future if the one we chose is allocated to another protocol or
if Ethertype DSA gets its own officially registered ethertype, and
everything will continue to work.)
That first patch from 2008 uses the name master.
The Marvell datasheets tend to just refer to the management CPU, and
sending to / receiving from frames via one of the switches
ports. There is no reference to the network interface the management
CPU must have in order to receive/send such frames.
Andrew
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