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Message-Id: <20220914085451.11723-10-arinc.unal@arinc9.com> Date: Wed, 14 Sep 2022 11:54:50 +0300 From: Arınç ÜNAL <arinc.unal@...nc9.com> To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, Rob Herring <robh+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>, Andrew Lunn <andrew@...n.ch>, Vivien Didelot <vivien.didelot@...il.com>, Florian Fainelli <f.fainelli@...il.com>, Vladimir Oltean <olteanv@...il.com>, "David S . Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Thomas Bogendoerfer <tsbogend@...ha.franken.de>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Sean Wang <sean.wang@...iatek.com>, Landen Chao <Landen.Chao@...iatek.com>, DENG Qingfang <dqfext@...il.com>, Sergio Paracuellos <sergio.paracuellos@...il.com>, erkin.bozoglu@...ont.com Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org, linux-mips@...r.kernel.org, Arınç ÜNAL <arinc.unal@...nc9.com> Subject: [PATCH 09/10] mips: dts: ralink: mt7621: fix external phy on GB-PC2 The address of the external phy on the mdio bus is 5. Update the devicetree for GB-PC2 accordingly. Fixes: 5bc148649cf3 ("staging: mt7621-dts: fix GB-PC2 devicetree") Signed-off-by: Arınç ÜNAL <arinc.unal@...nc9.com> --- arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts b/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts index 2e534ea5bab7..5f52193a4c37 100644 --- a/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts +++ b/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts @@ -83,12 +83,12 @@ &pcie { &gmac1 { status = "okay"; - phy-handle = <ðphy7>; + phy-handle = <ðphy5>; }; &mdio { - ethphy7: ethernet-phy@7 { - reg = <7>; + ethphy5: ethernet-phy@5 { + reg = <5>; phy-mode = "rgmii-rxid"; }; }; -- 2.34.1
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