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Message-Id: <20220921084745.3355107-2-yoshihiro.shimoda.uh@renesas.com>
Date: Wed, 21 Sep 2022 17:47:38 +0900
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
To: kishon@...com, vkoul@...nel.org, davem@...emloft.net,
edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
richardcochran@...il.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, geert+renesas@...der.be
Cc: andrew@...n.ch, linux-phy@...ts.infradead.org,
netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
Subject: [PATCH v2 1/8] clk: renesas: r8a779f0: Add Ethernet Switch clocks
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
---
drivers/clk/renesas/r8a779f0-cpg-mssr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
index 4baf355e26d8..304435613723 100644
--- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
@@ -161,6 +161,8 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = {
DEF_MOD("cmt3", 913, R8A779F0_CLK_R),
DEF_MOD("pfc0", 915, R8A779F0_CLK_CL16M),
DEF_MOD("tsc", 919, R8A779F0_CLK_CL16M),
+ DEF_MOD("tsn", 1505, R8A779F0_CLK_S0D2_HSC),
+ DEF_MOD("rsw", 1506, R8A779F0_CLK_RSW2),
DEF_MOD("ufs", 1514, R8A779F0_CLK_S0D4_HSC),
};
--
2.25.1
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